Patents by Inventor Junji Nakatsuka

Junji Nakatsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916563
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system capable of improving responsiveness of feedback control. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to sensor before first output part outputs the first digital data.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: February 27, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Jun'Ichi Naka, Koji Obata, Junji Nakatsuka, Hiroki Yoshino, Masaaki Nagai
  • Patent number: 11754593
    Abstract: A signal processing device includes a detection circuit, a correction circuit, and a comparator circuit. The detection circuit generates a first detection signal, based on an output signal of a capacitive detection element that detects inertial force. The correction circuit corrects non-linearity of the first detection signal and outputs a second detection signal thus corrected. The comparator circuit compares the first detection signal and the second detection signal with each other and outputs a comparison signal representing a result of comparison.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: September 12, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Keisuke Kuroda, Takuya Kajiwara, Junji Nakatsuka, Masaaki Nagai
  • Patent number: 11677411
    Abstract: An A/D converter includes an A/D conversion unit and an output unit. The A/D conversion unit includes a second A/D converter (successive approximation register A/D converter) and generates first digital data having a first number of bits and second digital data having a second number of bits, where the second number of bits is smaller than the first number of bits. The output unit provides first output information that is the first digital data and also provides second output information based on the second digital data. The output unit provides the second output information before providing the first output information.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: June 13, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Nakatsuka, Hiroki Yoshino, Jun'ichi Naka, Koji Obata, Masaaki Nagai
  • Patent number: 11664815
    Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: May 30, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaaki Nagai, Hiroki Yoshino, Junji Nakatsuka, Jun'ichi Naka, Koji Obata
  • Patent number: 11611349
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor system, and a test system capable of reducing the time for test processing. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to test controller before first output part outputs the first digital data. In the test mode, test controller determines whether or not sensor system including sensor is in an abnormal state on the basis of the second digital data.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: March 21, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koji Obata, Jun'ichi Naka, Junji Nakatsuka, Hiroki Yoshino, Masaaki Nagai
  • Publication number: 20220173746
    Abstract: An A/D converter includes an A/D conversion unit and an output unit. The A/D conversion unit includes a second A/D converter (successive approximation register A/D converter) and generates first digital data having a first number of bits and second digital data having a second number of bits, where the second number of bits is smaller than the first number of bits. The output unit provides first output information that is the first digital data and also provides second output information based on the second digital data. The output unit provides the second output information before providing the first output information.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 2, 2022
    Inventors: Junji NAKATSUKA, Hiroki YOSHINO, Jun'ichi NAKA, Koji OBATA, Masaaki NAGAI
  • Publication number: 20220158652
    Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 19, 2022
    Inventors: Masaaki NAGAI, Hiroki YOSHINO, Junji NAKATSUKA, Jun'ichi NAKA, Koji OBATA
  • Publication number: 20220155337
    Abstract: A signal processing device includes detection circuitry and correction circuitry. The detection circuitry includes a first detection unit and a second detection unit. The first detection unit generates at least one detection signal based on an associated one of output signals corresponding to each of at least two directions. The second detection unit has a broader detection range than the first detection unit and generates at least one correction signal based on the associated one of the output signals corresponding to each of the at least two directions. The correction circuitry corrects an associated one of the detection signals corresponding to each of the at least two directions with at least an associated one of the correction signals corresponding to at least one direction, other than one direction subjected to correction, out of the at least two directions.
    Type: Application
    Filed: January 9, 2020
    Publication date: May 19, 2022
    Inventors: Keisuke KURODA, Takuya KAJIWARA, Junji NAKATSUKA, Masaaki NAGAI
  • Publication number: 20220155334
    Abstract: A signal processing device includes a detection circuit, a correction circuit, and a comparator circuit. The detection circuit generates a first detection signal, based on an output signal of a capacitive detection element that detects inertial force. The correction circuit corrects non-linearity of the first detection signal and outputs a second detection signal thus corrected. The comparator circuit compares the first detection signal and the second detection signal with each other and outputs a comparison signal representing a result of comparison.
    Type: Application
    Filed: January 30, 2020
    Publication date: May 19, 2022
    Inventors: Keisuke KURODA, Takuya KAJIWARA, Junji NAKATSUKA, Masaaki NAGAI
  • Publication number: 20220123758
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor system, and a test system capable of reducing the time for test processing. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to test controller before first output part outputs the first digital data. In the test mode, test controller determines whether or not sensor system including sensor is in an abnormal state on the basis of the second digital data.
    Type: Application
    Filed: March 13, 2020
    Publication date: April 21, 2022
    Inventors: KOJI OBATA, JUN'ICHI NAKA, JUNJI NAKATSUKA, HIROKI YOSHINO, MASAAKI NAGAI
  • Publication number: 20220123757
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system capable of improving responsiveness of feedback control. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to sensor before first output part outputs the first digital data.
    Type: Application
    Filed: March 9, 2020
    Publication date: April 21, 2022
    Inventors: JUN'ICHI NAKA, KOJI OBATA, JUNJI NAKATSUKA, HIROKI YOSHINO, MASAAKI NAGAI
  • Patent number: 11050434
    Abstract: A digital-to-analog converter includes: a first partial circuit with a first bank of resistors and a first group of switches; a second partial circuit; a first resistor; a third partial circuit with a third bank of resistors and a third group of switches; and a fourth partial circuit with a fourth bank of resistors and a fourth group of switches Supposing that the first resistor has a resistance value R, the fourth bank of resistors has a combined resistance value of 2(n-m)R, the first bank of resistors has a combined resistance value of (2m?1)R, the third bank of resistors has a combined resistance value of (2m?1)R, and the second partial circuit has a combined resistance value of R/(2(n-m)?1).
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: June 29, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Junji Nakatsuka
  • Publication number: 20210167792
    Abstract: A digital-to-analog converter includes: a first partial circuit with a first bank of resistors and a first group of switches; a second partial circuit; a first resistor; a third partial circuit with a third bank of resistors and a third group of switches; and a fourth partial circuit with a fourth bank of resistors and a fourth group of switches Supposing that the first resistor has a resistance value R, the fourth bank of resistors has a combined resistance value of 2(n?m)R, the first bank of resistors has a combined resistance value of (2m?1)R, the third bank of resistors has a combined resistance value of (2m?1)R, and the second partial circuit has a combined resistance value of R/(2(n?m)?1).
    Type: Application
    Filed: November 14, 2018
    Publication date: June 3, 2021
    Inventor: Junji Nakatsuka
  • Patent number: 10581124
    Abstract: A battery assembly controller controls terminal voltages of a plurality of series-connected secondary batteries to be equal. The controller includes a discharge circuit selectively reducing the terminal voltages of the secondary batteries; and a monitoring circuit directly connected to positive and negative electrodes of the secondary batteries to monitor the terminal voltages of the secondary batteries.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: March 3, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Nakatsuka, Gorou Mori
  • Publication number: 20190123397
    Abstract: A battery assembly controller controls terminal voltages of a plurality of series-connected secondary batteries to be equal. The controller includes a discharge circuit selectively reducing the terminal voltages of the secondary batteries; and a monitoring circuit directly connected to positive and negative electrodes of the secondary batteries to monitor the terminal voltages of the secondary batteries.
    Type: Application
    Filed: December 19, 2018
    Publication date: April 25, 2019
    Inventors: Junji NAKATSUKA, Gorou MORI
  • Patent number: 10193194
    Abstract: A battery assembly controller controls terminal voltages of a plurality of series-connected secondary batteries to be equal. The controller includes a discharge circuit selectively reducing the terminal voltages of the secondary batteries; and a monitoring circuit directly connected to positive and negative electrodes of the secondary batteries to monitor the terminal voltages of the secondary batteries.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: January 29, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Nakatsuka, Gorou Mori
  • Publication number: 20160172717
    Abstract: A battery assembly controller controls terminal voltages of a plurality of series-connected secondary batteries to be equal. The controller includes a discharge circuit selectively reducing the terminal voltages of the secondary batteries; and a monitoring circuit directly connected to positive and negative electrodes of the secondary batteries to monitor the terminal voltages of the secondary batteries.
    Type: Application
    Filed: February 22, 2016
    Publication date: June 16, 2016
    Inventors: Junji NAKATSUKA, Gorou MORI
  • Patent number: 9218816
    Abstract: In a DAC device, a distortion correction function g1(x) of a harmonic obtained from a result of a frequency analysis on an analog output signal of a DAC circuit is obtained. A correction value is determined based on the correction function g1(x) in accordance with an input digital signal, and is previously stored in a memory. A nonlinear correction circuit reads a corresponding correction value from the memory in accordance with the value of a digital signal output from a digital filter, and transmits the correction value to a subtractor. The subtractor subtracts the correction value from the digital signal output from the digital filter.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: December 22, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshihiro Torii, Yoshihiro Horii, Masashi Uchida, Junji Nakatsuka, Takaaki Sato
  • Patent number: 9086372
    Abstract: A biosensor includes a working electrode 101, a counter electrode 102 opposing the working electrode 101, a working electrode terminal 103 and a working electrode reference terminal 10 connected to the working electrode 101 by wires, and a counter electrode terminal 104 connected to the counter electrode 102 by a wire. By employing a structure with at least three electrodes, it is possible to assay a target substance without being influenced by the line resistance on the working electrode side.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: July 21, 2015
    Assignee: PANASONIC HEALTHCARE HOLDINGS CO., LTD.
    Inventors: Hiroya Ueno, Junji Nakatsuka
  • Patent number: 9080955
    Abstract: A biosensor includes a working electrode 101, a counter electrode 102 opposing the working electrode 101, a working electrode terminal 103 and a working electrode reference terminal 10 connected to the working electrode 101 by wires, and a counter electrode terminal 104 connected to the counter electrode 102 by a wire. By employing a structure with at least three electrodes, it is possible to assay a target substance without being influenced by the line resistance on the working electrode side.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: July 14, 2015
    Assignee: Panasonic Healthcare Holdings Co., Ltd.
    Inventors: Hiroya Ueno, Junji Nakatsuka