Patents by Inventor Junpei Yamamoto
Junpei Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10580817Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.Type: GrantFiled: May 10, 2019Date of Patent: March 3, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Yusuke Otake, Akira Matsumoto, Junpei Yamamoto, Ryusei Naito, Masahiko Nakamizo, Toshifumi Wakano
-
Patent number: 10529767Abstract: The present disclosure relates to a solid state image sensor, a fabrication method, and an electronic apparatus, which enable to efficiently provide trench structures, which surrounds respective pixel sections of the solid state image sensor, and through-electrodes side by side. A solid state image sensor according to a first aspect of the present disclosure includes photoelectric conversion sections formed in respective pixel sections of a semiconductor substrate, trench structures defined by walls of insulating films formed in a depth direction of the semiconductor substrate and surrounding the respective pixel sections, and through-electrodes formed through the semiconductor substrate at positions overlapping the respective trench structures. The present disclosure can be applied, for example, to back-side illumination CMOS image sensors.Type: GrantFiled: July 1, 2016Date of Patent: January 7, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Naoyuki Sato, Ryosuke Matsumoto, Junpei Yamamoto
-
Patent number: 10473695Abstract: Provided is a current detection device in which, to a bus bar type shunt resistor, another member can be easily connected and fixed by means of rotational fastening of screw members. The current detection device is provided with: a pair of wiring members (11, 12) consisting of electrically conductive metal material; a resistor body (13) consisting of metal material having a smaller temperature coefficient of resistance than the wiring members and which is bonded to the wiring members; and a screw member (16) which is fixed to at least one of the wiring members and which is a separate member from the wiring members. One screw member (16) is fixed to one surface of the wiring members (11, 12), and another screw member (17) is rotationally fastened to the one screw member (16) sandwiching another member (18, 19) disposed on the other surface of the wiring members (11,12).Type: GrantFiled: May 13, 2016Date of Patent: November 12, 2019Assignee: KOA CORPORATIONInventors: Kenji Kameko, Junpei Yamamoto, Keishi Nakamura
-
Publication number: 20190326345Abstract: There is provided an imaging device with a semiconductor substrate having a first side and a second side opposite the first side. A photoelectric conversion unit is on the first side of the semiconductor substrate. A multilayer wiring layer is on the second side of the semiconductor substrate. A through electrode extends between the photoelectric conversion unit and the multilayer wiring layer. The multilayer wiring layer includes a local wiring layer. A second end of the through electrode is in direct contact with the local wiring layer.Type: ApplicationFiled: December 14, 2017Publication date: October 24, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Junpei YAMAMOTO, Takushi SHIGETOSHI, Takanori TADA, Shinpei FUKUOKA
-
Patent number: 10446601Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode (105) and a cathode (101). The cathode is in a well region (103) of the first substrate. The first pixel includes an isolation region (108) that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region (107a) between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.Type: GrantFiled: October 18, 2017Date of Patent: October 15, 2019Assignee: Sony Semiconductor Solutions CorporationInventors: Yusuke Otake, Akira Matsumoto, Junpei Yamamoto, Ryusei Naito, Masahiko Nakamizo, Toshifumi Wakano
-
Publication number: 20190267414Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.Type: ApplicationFiled: May 10, 2019Publication date: August 29, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke OTAKE, Akira MATSUMOTO, Junpei YAMAMOTO, Ryusei NAITO, Masahiko NAKAMIZO, Toshifumi WAKANO
-
Patent number: 10332921Abstract: The present disclosure relates to a solid-state image sensing device capable of restricting an occurrence of a dark current and a method for manufacturing the same, and an electronic device. A solid-state image sensing device includes a FD part formed on a P-type semiconductor substrate by implanting an N-type impurity, a high-dielectric insulative film laminated on at least the FD part, and a contact electrode connected to the FD part in a connection structure via the high-dielectric insulative film. For example, the high-dielectric insulative film is formed by use of a material which reduces the schottky barrier height in a connection part between the FD part and the electrode in a single layer or in a plurality of layers. The present technology is applicable to CMOS image sensors, for example.Type: GrantFiled: September 27, 2016Date of Patent: June 25, 2019Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tsukasa Miura, Shuji Manda, Tomoyuki Hirano, Junpei Yamamoto, Kazunobu Ota
-
Publication number: 20190088696Abstract: The present disclosure relates to a solid state image sensor, a fabrication method, and an electronic apparatus, which enable to efficiently provide trench structures, which surrounds respective pixel sections of the solid state image sensor, and through-electrodes side by side. A solid state image sensor according to a first aspect of the present disclosure includes photoelectric conversion sections formed in respective pixel sections of a semiconductor substrate, trench structures defined by walls of insulating films formed in a depth direction of the semiconductor substrate and surrounding the respective pixel sections, and through-electrodes formed through the semiconductor substrate at positions overlapping the respective trench structures. The present disclosure can be applied, for example, to back-side illumination CMOS image sensors.Type: ApplicationFiled: July 1, 2016Publication date: March 21, 2019Inventors: Naoyuki SATO, Ryosuke MATSUMOTO, Junpei YAMAMOTO
-
Publication number: 20190006399Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode (105) and a cathode (101). The cathode is in a well region (103) of the first substrate. The first pixel includes an isolation region (108) that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region (107a) between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.Type: ApplicationFiled: October 18, 2017Publication date: January 3, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke OTAKE, Akira MATSUMOTO, Junpei YAMAMOTO, Ryusei NAITO, Masahiko NAKAMIZO, Toshifumi WAKANO
-
Publication number: 20180350854Abstract: The present disclosure relates to a solid-state image sensing device capable of restricting an occurrence of a dark current and a method for manufacturing the same, and an electronic device. A solid-state image sensing device includes a FD part formed on a P-type semiconductor substrate by implanting an N-type impurity, a high-dielectric insulative film laminated on at least the FD part, and a contact electrode connected to the FD part in a connection structure via the high-dielectric insulative film. For example, the high-dielectric insulative film is formed by use of a material which reduces the schottky barrier height in a connection part between the FD part and the electrode in a single layer or in a plurality of layers. The present technology is applicable to CMOS image sensors, for example.Type: ApplicationFiled: September 27, 2016Publication date: December 6, 2018Inventors: TSUKASA MIURA, SHUJI MANDA, TOMOYUKI HIRANO, JUNPEI YAMAMOTO, KAZUNOBU OTA
-
Publication number: 20180156844Abstract: Provided is a current detection device in which, to a bus bar type shunt resistor, another member can be easily connected and fixed by means of rotational fastening of screw members. The current detection device is provided with: a pair of wiring members (11, 12) consisting of electrically conductive metal material; a resistor body (13) consisting of metal material having a smaller temperature coefficient of resistance than the wiring members and which is bonded to the wiring members; and a screw member (16) which is fixed to at least one of the wiring members and which is a separate member from the wiring members. One screw member (16) is fixed to one surface of the wiring members (11, 12), and another screw member (17) is rotationally fastened to the one screw member (16) sandwiching another member (18, 19) disposed on the other surface of the wiring members (11,12).Type: ApplicationFiled: May 13, 2016Publication date: June 7, 2018Applicant: KOA CORPORATIONInventors: Kenji Kameko, Junpei Yamamoto, Keishi Nakamura
-
Patent number: 9181894Abstract: A control system for an internal combustion engine having a throttle valve disposed in an intake passage of the engine is provided. A wide-open intake air amount, which is an intake air amount corresponding to a state where the throttle valve is fully opened, is calculated according to the engine rotational speed, and a theoretical intake air amount, which is an intake air amount corresponding to a state where no exhaust gas of the engine is recirculated to a combustion chamber of the engine, is calculated according to the wide-open intake air amount and the intake pressure. An intake air amount of the engine is detected or estimated, and an amount of the evaporative fuel/air mixture supplied through the evaporative fuel passage to the intake passage is calculated. An intake gas amount is calculated by correcting the intake air amount using the evaporative fuel/air mixture amount, and an exhaust gas recirculation ratio is calculated using the theoretical intake air amount and the intake gas amount.Type: GrantFiled: October 26, 2011Date of Patent: November 10, 2015Assignee: HONDA MOTOR CO., LTD.Inventors: Seiichiro Irie, Hiroshi Kubo, Yoshitomo Kono, Hiroaki Tone, Toshifumi Hiraboshi, Junpei Yamamoto, Hirotaka Komatsu
-
Publication number: 20130245922Abstract: A control system for an internal combustion engine having a throttle valve disposed in an intake passage of the engine is provided. A wide-open intake air amount, which is an intake air amount corresponding to a state where the throttle valve is fully opened, is calculated according to the engine rotational speed, and a theoretical intake air amount, which is an intake air amount corresponding to a state where no exhaust gas of the engine is recirculated to a combustion chamber of the engine, is calculated according to the wide-open intake air amount and the intake pressure. An intake air amount of the engine is detected or estimated, and an amount of the evaporative fuel/air mixture supplied through the evaporative fuel passage to the intake passage is calculated. An intake gas amount is calculated by correcting the intake air amount using the evaporative fuel/air mixture amount, and an exhaust gas recirculation ratio is calculated using the theoretical intake air amount and the intake gas amount.Type: ApplicationFiled: October 26, 2011Publication date: September 19, 2013Applicant: HONDA MOTOR CO., LTD.Inventors: Seiichiro Irie, Hiroshi Kubo, Yoshitomo Kono, Hiroaki Tone, Toshifumi Hiraboshi, Junpei Yamamoto, Hirotaka Komatsu
-
Publication number: 20120290195Abstract: A control system for an internal combustion engine having a throttle valve disposed in an intake passage of the engine is provided. A wide-open intake air amount, which is an intake air amount corresponding to a state where the throttle valve is fully opened, is calculated according to the engine rotational speed, and a theoretical intake air amount, which is an intake air amount corresponding to a state where no exhaust gas of the engine is recirculated to a combustion chamber of the engine, is calculated according to the wide-open intake air amount and the intake pressure. An actual intake air amount of the engine is detected or estimated, and an exhaust gas recirculation ratio is calculated using the theoretical intake air amount and the actual intake air amount. The engine is controlled using the calculated exhaust gas recirculation ratio.Type: ApplicationFiled: September 24, 2010Publication date: November 15, 2012Applicant: HONDA MOTOR CO., LTD.Inventors: Seiichiro Irie, Yoshitomo Kono, Hirotaka Komatsu, Hiroaki Tone, Junpei Yamamoto, Hiroshi Kubo, Toshifumi Hiraboshi
-
Patent number: 7682974Abstract: A method for manufacturing a semiconductor device includes the steps of: forming an etching layer (17) formed of silicon on a semiconductor substrate (10); forming a mask layer (20) with a pattern on the etching layer (17), which includes an intermediate layer (22) as a silicon oxide film and a top layer (24) as a polysilicon; and etching the etching layer (17) using the mask layer (20) as a mask, and eliminating the top layer (24).Type: GrantFiled: May 30, 2008Date of Patent: March 23, 2010Assignee: Spansion LLCInventors: Fumihiko Inoue, Junpei Yamamoto, Suguru Sassa
-
Publication number: 20090004838Abstract: A method for manufacturing a semiconductor device includes the steps of: forming an etching layer (17) formed of silicon on a semiconductor substrate (10); forming a mask layer (20) with a pattern on the etching layer (17), which includes an intermediate layer (22) as a silicon oxide film and a top layer (24) as a polysilicon; and etching the etching layer (17) using the mask layer (20) as a mask, and eliminating the top layer (24).Type: ApplicationFiled: May 30, 2008Publication date: January 1, 2009Applicant: SPANSION LLCInventors: Fumihiko INOUE, Junpei YAMAMOTO, Suguru SASSA