Abstract: The present application discloses a shift-register circuit and driving method, a gate-driving circuit and display apparatus. The shift-register circuit includes an input sub-circuit, a reset sub-circuit, an output sub-circuit, a pull-down control sub-circuit, and a pull-down sub-circuit. The pull-down control sub-circuit is configured, after an output period of an operation cycle for displaying one frame of image, to control the pull-down node at a first voltage level to keep voltage level low at an output port. Additionally, the pull-down sub-circuit is configured, under control of power signals, to pull down the voltage level at the output port. For the display-touch panel with full-in-cell touch sensors, the voltage level at output port can be effectively reduced to avoid mutual interference between drive signals and touch-control signals.

Abstract: The present disclosure provides a fingerprint recognition substrate, including: an electrode driving circuit, a signal line extending in a first direction, and a gate line extending in a second direction, where the electrode driving circuit is connected to the signal line and the gate line; and a functional electrode layer comprising a first electrode connected to the electrode driving circuit and a second electrode extending in the second direction, where a mutual capacitance is formed by the first electrode and the second electrode, and where multiple ones of the first electrode disposed in a same column along the first direction are connected a same one of the signal line through the electrode driving circuit, respectively.

Abstract: An array substrate has a plurality of sub-pixel regions, and each sub-pixel region includes an opening region and a pixel defining region surrounding the opening region. The array substrate includes a base and a plurality of touch signal lines disposed on the base. An orthographic projection of at least one touch signal line on the base passes through, along an extending direction thereof, at least one opening region.

Abstract: The present disclosure provides a shift register circuitry, a gate driving circuit, and a display device. The shift register circuitry of the present disclosure includes a first shift register unit, a second shift register unit, a pull-down control sub-circuit (20), and a pull-down sub-circuit (30); wherein the first shift register unit includes a first input Sub-circuit (11), a first output sub-circuit (12), a first reset sub-circuit, and a first noise reduction sub-circuit (14); a second shift register unit includes a second input sub-circuit (21), a second output sub-circuit (22), a second reset sub-circuit and a second noise reduction sub-circuit (24).

Abstract: A shift register circuit including a switch control port configured to couple to a pull-up node via two transistors in series controlled by another transistor. The switch control port is configured to keep at a low voltage level during a display scan stage for the shift register circuit to output a gate scanning signal via an output port to a gate line which optionally still transmit a touch scanning signal, to switch to a high voltage level to halt the gate scanning signal while transmitting the touch scanning signal only in the gate line during a touch scan stage within the display scan stage, and to switch back to the low voltage level after the touch scan stage to output the gate scanning signal without coupling interference of the touch scanning signal. The shift register circuit is compatible for driving either 60 Hz or high-frequency (>60 Hz) Full-in-cell touch sensing display panel.

Abstract: The present disclosure relates to the field of biological technologies, and discloses a method for expressing and preparing a polyvalent multi-specific antibody and an immune hybrid protein. By using the characteristics of protein Intein, a novel method for preparing a polyvalent specific antibody, a hybrid immune protein having an antibody fused to a cytokine, an immunotoxin having an antibody fused to a toxin, or an immune hybrid protein having an antibody fused to other active proteins is designed and developed. Each portion of a hybrid protein is respectively expressed in a suitable prokaryotic or eukaryotic cell system, separated and purified by high-performance affinity chromatography, and then spliced in vitro by trans-splicing mediated by the intein, to prepare a polyvalent specific antibody and an immune hybrid protein. The method has high production efficiency, and wide scope of application, and facilitates the separation and purification of the products.

Abstract: A shift register, a gate driving circuit, a display device, and a driving method of a node sustaining circuit are disclosed. The shift register includes an input sub-circuit, a reset sub-circuit, an output sub-circuit, a pull-down sub-circuit, a first control sub-circuit, a second control sub-circuit, a first storage sub-circuit, and a node sustaining circuit. The node sustaining circuit is configured to sustain the potential of a node, which is one of a pull-up node or a pull-down node in the shift register.

Abstract: The present disclosure provides a shift register circuitry, a gate driving circuit, and a display device. The shift register circuitry of the present disclosure includes a first shift register unit, a second shift register unit, a pull-down control sub-circuit (20), and a pull-down sub-circuit (30); wherein the first shift register unit includes a first input Sub-circuit (11), a first output sub-circuit (12), a first reset sub-circuit, and a first noise reduction sub-circuit (14); a second shift register unit includes a second input sub-circuit (21), a second output sub-circuit (22), a second reset sub-circuit and a second noise reduction sub-circuit (24).

Abstract: A shift register circuit including a switch control port configured to couple to a pull-up node via two transistors in series controlled by another transistor. The switch control port is configured to keep at a low voltage level during a display scan stage for the shift register circuit to output a gate scanning signal via an output port to a gate line which optionally still transmit a touch scanning signal, to switch to a high voltage level to halt the gate scanning signal while transmitting the touch scanning signal only in the gate line during a touch scan stage within the display scan stage, and to switch back to the low voltage level after the touch scan stage to output the gate scanning signal without coupling interference of the touch scanning signal. The shift register circuit is compatible for driving either 60 Hz or high-frequency (>60 Hz) Full-in-cell touch sensing display panel.

Abstract: The present application discloses a shift-register circuit and driving method, a gate-driving circuit and display apparatus. The shift-register circuit includes an input sub-circuit, a reset sub-circuit, an output sub-circuit, a pull-down control sub-circuit, and a pull-down sub-circuit. The pull-down control sub-circuit is configured, after an output period of an operation cycle for displaying one frame of image, to control the pull-down node at a first voltage level to keep voltage level low at an output port. Additionally, the pull-down sub-circuit is configured, under control of power signals, to pull down the voltage level at the output port. For the display-touch panel with full-in-cell touch sensors, the voltage level at output port can be effectively reduced to avoid mutual interference between drive signals and touch-control signals.

Abstract: Embodiments of the present disclosure disclose a gate driving circuit, a method for driving the same, and a display apparatus. The gate driving circuit includes N stages of cascaded shift registers, N being an integer greater than or equal to 4. In the N stages of shift registers, an output signal terminal of an nth stage of shift register is connected to an input signal terminal of an (n+l/2)th stage of shift register, and a reset signal terminal of the nth stage of shift register is connected to an output signal terminal of an (n+K)th stage of shift register, wherein n is an integer greater than or equal to 1 and less than (N?l/2), K is an integer greater than l/2 and less than l, and l is a number of clock signal lines connected to the gate driving circuit, which is an even number greater than or equal to 4.

Abstract: Embodiments of the present disclosure disclose a gate driving circuit, a method for driving the same, and a display apparatus. The gate driving circuit includes N stages of cascaded shift registers, N being an integer greater than or equal to 4. In the N stages of shift registers, an output signal terminal of an nth stage of shift register is connected to an input signal terminal of an (n+I/2)th stage of shift register, and a reset signal terminal of the nth stage of shift register is connected to an output signal terminal of an (n+K)th stage of shift register, wherein n is an integer greater than or equal to 1 and less than (N?I/2), K is an integer greater than I/2 and less than I, and I is a number of clock signal lines connected to the gate driving circuit, which is an even number greater than or equal to 4.

Abstract: The embodiments of the present application provide a shift register and a method for driving the same. The shift register comprises: an input unit, a pull-up unit, a reset unit, a pull-down control unit, a pull-down unit and a pull-up holding unit. The input unit is configured to couple a first voltage terminal to a pull-up point. The pull-up unit is configured to couple a clock signal terminal to an output signal terminal. The reset unit is configured to couple a second voltage terminal to the pull-up point. The pull-down control unit is configured to selectively couple one of the second voltage terminal and a third voltage terminal to a pull-down point. The pull-down unit is configured to couple the second voltage terminal to the pull-up point and the output signal terminal. The pull-up holding unit is configured to couple a fourth voltage terminal to the pull-up point.

Abstract: Embodiments of the present invention provides a liquid crystal display panel and a manufacturing method thereof, the present invention relates to the field of display technology and can eliminate vacuum bubbles so as to increase the product yield. The liquid crystal display panel comprises an array substrate and a color filter substrate which are assembled to form a cell, and a liquid crystal layer and spacers provided between the array substrate and the color filter substrate, wherein the spacer is provided with a deformation layer therein, and the deformation layer is used to allow the spacer to be expanded in a direction perpendicular to the cell thickness direction under the action of an external condition.

Abstract: The present disclosure relates to the field of biological technologies, and discloses a method for expressing and preparing a bivalent bispecific antibody. In the present disclosure, each portion of a bivalent bispecific antibody and an immune hybrid protein thereof is respectively expressed in a suitable prokaryotic or eukaryotic cell system, separated and purified by high-performance affinity chromatography, and then spliced in vitro by trans-splicing reaction mediated by an intein, to prepare the bivalent specific antibody and an immune hybrid protein thereof. The method has high production efficiency and wide scope of application, and facilitates the separation and purification of the products. The product prepared through the present method has bivalent bispecific immune affinity and cytotoxic bioactivity. Therefore, the present disclosure provides a novel method for preparing biological drugs for directionally attacking cancers or other diseases.

Abstract: The disclosure provides a transfer plate, a display screen, a display device and a method for manufacturing a display device. The transfer plate includes a print region and a non-print region, and the print region includes multiple print sub-units which are arranged in a one-to-one correspondence with multiple unit display screens of a motherboard. Each print sub-unit is provided with a mark region, and the mark regions are for forming marks on the respective unit display screens while forming alignment films on the respective unit display screens of the motherboard, to identify the respective unit display screens of the motherboard.

Abstract: The present application discloses a shift register unit and driving method, a gate drive circuit, and a display apparatus. The shift register unit includes a pull-up control sub-circuit configured to pass an input signal to a pull-up node to control a pull-up sub-circuit to output a clock signal to an output port as a gate drive signal for the display apparatus. The shift register unit further includes a pull-down control sub-circuit to pull down potential of the pull-down node to logic low. Additionally, the shift register unit includes a noise-reduction sub-circuit controlled by the pull-down node potential to respectively pull down the potentials of the pull-up node and the output port to logic low. Furthermore, the shift register unit includes a reset sub-circuit controlled by a reset signal to respectively pull down and maintain a logic low potential at the pull-up node and the output port, reducing noise thereof.

Abstract: The present disclosure provides a method and a device for measuring mura levels of liquid crystal display devices. The method includes steps of: acquiring correspondence between standard brightness data differences and standard mura levels; acquiring a measurement brightness data difference of a test image displayed by a to-be-tested liquid crystal display device before and after the measurement; and acquiring a mura level corresponding to the measurement brightness data difference in accordance with the correspondence.

Abstract: The present invention discloses an evaporation method and an evaporation device. The evaporation method includes successively providing at least one mask above a base substrate and forming at least one evaporation sub-pattern on the base substrate by an evaporation process so that an evaporation pattern is formed on the base substrate, wherein the evaporation pattern is constituted by the at least one evaporation sub-pattern. As the evaporation pattern finally formed is constituted by the at least one evaporation sub-pattern, only a small number of opening regions are required to be formed on each of the masks used for forming the evaporation sub-patterns compared with the prior art, so that the widths of the shield regions between the adjacent opening regions may be set to be larger.