Abstract: A flight control method of an agricultural unmanned aerial vehicle (UAV) includes controlling a rotation device to rotate continuously to drive a radar detection device to rotate continuously, obtaining detection information at a plurality of rotation directions during continuous rotation of the radar detection device, and controlling take-off and landing of the agricultural UAV according to the detection information.

Abstract: A weak target detection method includes transmitting a plurality of frequency modulated continuous wave signals during rotation of a microwave radar sensor, receiving a plurality of echo signals reflected by a weak target, accumulating the plurality of echo signals in a beam width of the microwave radar sensor to obtain an accumulated echo signal, and determining position information of the weak target according to the accumulated echo signal.

Abstract: An obstacle avoidance method for an unmanned aerial vehicle (UAV) includes determining a flight trajectory of an obstacle relative to the UAV according to measurement data output by a radar arranged at the UAV, and performing an obstacle avoidance according to the flight trajectory of the obstacle.

Abstract: An unmanned aerial vehicle (UAV) includes a radar configured to perform ranging on a ground during rotation and a terrain prediction device communicatively connected to the radar. The terrain prediction device includes a memory storing a computer program and a processor configured to execute the computer program to acquire N pieces of ranging data each being obtained by the radar when a rotation angle of the radar is within a preset angle interval, and determining a terrain parameter of the ground according to the N pieces of ranging data. N is an integer greater than 1. The terrain parameter includes at least one of a gradient or a flatness.

Abstract: A method of detecting target signals includes obtaining detection signals from a detection device, the detection device being to detect a target object around an unmanned aerial vehicle, selecting a test signal and neighboring signals from the detection signals, determining a signal threshold corresponding to the test signal according to the neighboring signals, and determining whether the test signal includes a target signal from the target object according to the signal threshold.

Abstract: An unmanned aerial vehicle including a controller is provided. The controller is configured to determine a first relative height between the unmanned aerial vehicle and a ground reflector directly below the unmanned aerial vehicle and a second relative height between the unmanned aerial vehicle and a ground reflector ahead the unmanned aerial vehicle. The controller then determines a combined relative height for reflecting a front terrain change according to at least the first relative height and the second relative height. Based on the determined combined relative height, the controller further adjusts the flight attitude of the unmanned aerial vehicle.

Abstract: The present disclosure provides an unmanned aerial vehicle (UAV) control method. The method includes controlling a microwave radar disposed on the UAV to transmit a microwave signal while rotating around a rotating shaft; acquiring a frequency of an intermediate frequency signal based on a frequency of the transmitted signal and a frequency of an echo signal; determining a distance between the UAV and a surrounding obstacle based on the frequency of the intermediate frequency signal; and adjusting a flight path of the UAV based on the distance between the UAV and the surrounding obstacle.

Abstract: An obstacle-avoidance control method comprises acquiring a distance between an unmanned aerial vehicle (UAV) and a front object in a flying direction of the UAV; and controlling a flying altitude of the UAV according to the distance between the UAV and the front object.

Abstract: The present invention provides a method of aligning a quadrate wafer in a first photolithography process. The method includes: step A: fabricating mask aligning markers in a periphery region of a mask, which is used for a first exposure process of the quadrate wafer, around a mask pattern of the mask; step B: during the first exposure process, positioning the quadrate wafer in a preset region by using the mask aligning markers on the mask, and exposing the quadrate wafer through the mask; and step C: performing alignment for the quadrate wafer during a second exposure process and subsequent exposure processes by using aligning markers on the quadrate wafer that are obtained during the first exposure process. The method may be easily and reliably performed to ensure intact dies at periphery of a quadrate wafer to be produced and thus render increased yield of chips.

Abstract: The present invention provides a shift register, which comprises a first signal conversion module and a second signal conversion module, the first signal conversion module being connected to an start signal input terminal, a clock signal terminal, a high-level input terminal, a low-level input terminal and an input terminal of the second signal conversion module, respectively, and the second signal conversion module being connected to an output terminal of the first signal conversion module, the clock signal terminal, a signal output terminal, a high-level input terminal and a low-level input terminal, respectively. The present invention also provides a shift register, a gate driving circuit and a display device. The shift register cell provided by the present invention only needs a single-phase clock signal to perform control, thereby simplifying the structure of the shift register cell.

Abstract: The present invention provides a shift register, which comprises a first signal conversion module and a second signal conversion module, the first signal conversion module being connected to an start signal input terminal, a clock signal terminal, a high-level input terminal, a low-level input terminal and an input terminal of the second signal conversion module, respectively, and the second signal conversion module being connected to an output terminal of the first signal conversion module, the clock signal terminal, a signal output terminal, a high-level input terminal and a low-level input terminal, respectively. The present invention also provides a shift register, a gate driving circuit and a display device. The shift register cell provided by the present invention only needs a single-phase clock signal to perform control, thereby simplifying the structure of the shift register cell.

Abstract: The present disclosure involves a GaN-based Schottky diode rectifier and a method of manufacturing the same. The GaN-based Schottky diode rectifier includes: a substrate, on which a GaN intrinsic layer and a barrier layer are grown in turn; a p-type two-dimension electron gas depletion layer located on an upper surface of the barrier layer; a cathode electrode located at a position on the upper surface of the barrier layer where is different from the position where the p-type two-dimension electron gas depletion layer is formed; and an anode electrode including a first part and a second part electrically connected to each other.

Abstract: The present invention discloses a method of forming a polygon-sectional rodlike ingot having an orientation marker or rounded corners, a rodlike ingot and a sheet substrate so formed. The method comprises: selecting one of sides of the polygon-sectional rodlike ingot that is parallel to an axial direction thereof as a first feature of a surface orientation marker; forming a minisize notch, which is parallel to an edge, in the one of sides selected as the first feature in the axial direction of the rodlike ingot, as a second feature of the orientation marker; and processing the rodlike ingot to form rounded corners. The sheet substrate is obtained by cutting the rodlike ingot.

Abstract: The present invention provides a method of aligning a quadrate wafer in a first photolithography process. The method includes: step A: fabricating mask aligning markers in a periphery region of a mask, which is used for a first exposure process of the quadrate wafer, around a mask pattern of the mask; step B: during the first exposure process, positioning the quadrate wafer in a preset region by using the mask aligning markers on the mask, and exposing the quadrate wafer through the mask; and step C: performing alignment for the quadrate wafer during a second exposure process and subsequent exposure processes by using aligning markers on the quadrate wafer that are obtained during the first exposure process. The method may be easily and reliably performed to ensure intact dies at periphery of a quadrate wafer to be produced and thus render increased yield of chips.

Abstract: The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same. The light emitting diode packaging structure has an insulating substrate with through holes formed on each side of the upper surface thereof, the through hole being filled with conductive metal. Additionally, a n-type layer, an active layer, a p-type layer, an insulating layer and a p-type electrode are formed on the insulating substrate. The structure further may include a n-type electrode provided on a side of the upper surface of the n-type layer; a first back electrode provided at one side of the back surface of the insulating substrate; a second back electrode provided at the other side of back surface of the insulating substrate; and an optical element packaged on the base substrate.

Abstract: The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system includes an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment.

Abstract: The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system comprises an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment.

Abstract: The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same.

Abstract: The present invention discloses A graphene film electrical current spreading layer applied GaN-based LED in vertical. structure, comprising: a p-type metal electrode including a metal support substrate and a metal reflective mirror formed on the metal support substrate; a hole injecting layer formed on the metal reflective mirror of the p-type metal electrode; an electron blocking layer formed on the hole injecting layer; a lighting layer formed on the electron blocking layer; an electron limiting layer formed on the lighting layer; an electron injecting layer formed on the electron limiting layer; an electrical current spreading layer formed on the electron injecting layer; two n-type metal electrodes formed on the electrical spreading layer and covering a part of the electrical current spreading layer.

Abstract: A white LED of a blue and yellow light emitting (structure) layer stacked structure includes a sapphire substrate, or gallium nitride substrate, or silicon carbide substrate, or silicon substrate; a buffer layer formed on the substrate; an N type gallium nitride epitaxial layer formed on the buffer layer; an N doped AlaInbGa1-a-bN quarternary alloy formed on the N type gallium nitride epitaxial layer; a blue light emitting structure layer which contains one or more InxGa1-xN/AlaInbGa1-a-bN quantum well(s) formed on the N type AlaInbGa1-a-bN layer; a yellow light emitting structure layer which contains one or more InyGa1-yN/AlaInbGa1-a-bN quantum well(s) formed on the InxGa1-xN/AlaInbGa1-a-bN quantum well structure; or alternatively, a yellow light emitting structure layer which contains one or more InyGa1-yN/AlaInbGa1-a-bN quantum well(s) being formed on the N type AlaInbGa1-a-bN layer first, and then a blue light emitting structure layer which contains one or more InxGa1-xN/AlaInbGa1-a-bN quantum well(s) bei