Abstract: The present invention discloses a method of forming a polygon-sectional rodlike ingot having an orientation marker or rounded corners, a rodlike ingot and a sheet substrate so formed. The method comprises: selecting one of sides of the polygon-sectional rodlike ingot that is parallel to an axial direction thereof as a first feature of a surface orientation marker; forming a minisize notch, which is parallel to an edge, in the one of sides selected as the first feature in the axial direction of the rodlike ingot, as a second feature of the orientation marker; and processing the rodlike ingot to form rounded corners. The sheet substrate is obtained by cutting the rodlike ingot.

Abstract: The present invention provides a method of aligning a quadrate wafer in a first photolithography process. The method includes: step A: fabricating mask aligning markers in a periphery region of a mask, which is used for a first exposure process of the quadrate wafer, around a mask pattern of the mask; step B: during the first exposure process, positioning the quadrate wafer in a preset region by using the mask aligning markers on the mask, and exposing the quadrate wafer through the mask; and step C: performing alignment for the quadrate wafer during a second exposure process and subsequent exposure processes by using aligning markers on the quadrate wafer that are obtained during the first exposure process. The method may be easily and reliably performed to ensure intact dies at periphery of a quadrate wafer to be produced and thus render increased yield of chips.

Abstract: The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same. The light emitting diode packaging structure has an insulating substrate with through holes formed on each side of the upper surface thereof, the through hole being filled with conductive metal. Additionally, a n-type layer, an active layer, a p-type layer, an insulating layer and a p-type electrode are formed on the insulating substrate. The structure further may include a n-type electrode provided on a side of the upper surface of the n-type layer; a first back electrode provided at one side of the back surface of the insulating substrate; a second back electrode provided at the other side of back surface of the insulating substrate; and an optical element packaged on the base substrate.

Abstract: The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system includes an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment.

Abstract: The disclosure provides a system and method for multi-functional online testing of semiconductor light-emitting devices or modules. The system comprises an electrical characteristic generating and testing equipment, one or more optical characteristic detecting and controlling equipments, an optical signal processing and analyzing equipment, one or more thermal characteristic detecting equipments, a central monitoring and processing computer, a multi-channel integrated drive controlling equipment, one or more multi-stress accelerated degradation controlling equipments, and one or more load boards. The present disclosure enables in-situ online monitoring and testing under accelerated degradation in a multi-stress accelerated degradation environment.

Abstract: The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same.

Abstract: The present invention discloses A graphene film electrical current spreading layer applied GaN-based LED in vertical. structure, comprising: a p-type metal electrode including a metal support substrate and a metal reflective mirror formed on the metal support substrate; a hole injecting layer formed on the metal reflective mirror of the p-type metal electrode; an electron blocking layer formed on the hole injecting layer; a lighting layer formed on the electron blocking layer; an electron limiting layer formed on the lighting layer; an electron injecting layer formed on the electron limiting layer; an electrical current spreading layer formed on the electron injecting layer; two n-type metal electrodes formed on the electrical spreading layer and covering a part of the electrical current spreading layer.

Abstract: A white LED of a blue and yellow light emitting (structure) layer stacked structure includes a sapphire substrate, or gallium nitride substrate, or silicon carbide substrate, or silicon substrate; a buffer layer formed on the substrate; an N type gallium nitride epitaxial layer formed on the buffer layer; an N doped AlaInbGa1-a-bN quarternary alloy formed on the N type gallium nitride epitaxial layer; a blue light emitting structure layer which contains one or more InxGa1-xN/AlaInbGa1-a-bN quantum well(s) formed on the N type AlaInbGa1-a-bN layer; a yellow light emitting structure layer which contains one or more InyGa1-yN/AlaInbGa1-a-bN quantum well(s) formed on the InxGa1-xN/AlaInbGa1-a-bN quantum well structure; or alternatively, a yellow light emitting structure layer which contains one or more InyGa1-yN/AlaInbGa1-a-bN quantum well(s) being formed on the N type AlaInbGa1-a-bN layer first, and then a blue light emitting structure layer which contains one or more InxGa1-xN/AlaInbGa1-a-bN quantum well(s) bei