Abstract: In a method of generating a multi-level signal having one of three or more voltage levels that are different from one another, input data including two or more bits is received. A drive strength of at least one of two or more driving paths is changed based on the two or more bits such that a first transition time, during which an output data signal is transitioned from a first voltage level to a second voltage level, is changed. The output data signal that is the multi-level signal is generated such that the first transition time of the output data signal is changed and a second transition time, during which the output data signal is transitioned from the first voltage level to a third voltage level different from the second voltage level, is maintained.

Abstract: An instrumentation amplifier includes an input chopping circuit configured to convert differential input voltages into differential chopping input voltages according to a chopping signal; a compensation voltage input circuit configured to generate differential compensation voltages according to differential compensation signals; a compensation chopping circuit configured to generated signals by performing chopping operation on the differential compensation voltages according to the chopping signal and to provide the signals to the compensation voltage input circuit; an amplifier circuit configured to generate differential output voltages from the differential chopping input voltages and the differential compensation voltages; a modulation circuit configured to modulate the differential output voltages; an output chopping circuit configured to generate a bitstream signal by converting phase of an output of the modulation circuit according to the chopping signal; and a filter circuit configured to filter the bi

Abstract: A bearing for an at least partially spherical component, the bearing including a first portion and a complementary second portion integral with the first portion and joined by a folded-over bridge portion, the first portion and the second portion each including an arcuate inner surface, where the first portion and the second portion are adapted to at least partially surround and provide a compressive spring force against the component to form a joint assembly allowing for rotation of the component, where the first portion and the second portion form a semispherical void around the component, and where the bearing includes a metal substrate and a low friction layer overlying at least one surface of the substrate.

Abstract: An electronic device is disclosed. The electronic device according to the present disclosure includes a body, a neck formed at one side of the body, and a head formed on the neck, wherein the head comprises: a circular part connected to the neck; a protrusion part protruding from one side of the circular part and having a curvature that is greater than a curvature of the circular part; a speaker hole formed at at least one of the circular part and the protrusion part; and a band part formed at the periphery of the speaker hole, and the thickness of the band part may be greater than the thickness of the circular part or the protrusion part around the band part.

Abstract: The present invention relates to an eco-friendly panel and a manufacturing method therefor. Specifically, the eco-friendly panel includes: a waste fiber felt layer molded from at least one selected from the group consisting of polyester, cotton, and other fibers that are classified as waste fibers and cut into predetermined sizes; at least one mucous layer in which at least one powder selected from the group consisting of zeolite powder, bentonite, montmorillonite, briquette ash, volcanic soil, perlite, ocher, charcoal, orthoclase powder, elvan powder, jade powder, germanium powder, and calcined shell powder is stirred in mixture with a mucilage substance extracted from waste algae such as waste brown algae, waste red algae, or waste green algae; and at least one nanocarbon layer in which plate-shaped graphite, graphene, and boron nitride are mixed at a weight ratio of 2:1:0.

Abstract: The present application provides a replaceable galvanic protection anode system for preventing and limiting the effects of liberation and damage to airfoils in a gas turbine, wherein turbine components are covered by a sacrificial material. The galvanic protection layer of the replaceable anodes may include a sacrificial material, such as aluminum, wherein the material provides corrosion resistance to the substrate. Additionally, the galvanic protection layer may include a sacrificial conductive material insert for increasing the conductivity of the sacrificial material and further improve the corrosion resistance of the replaceable anodes.

Abstract: A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.

Abstract: An amplifying device includes a main amplifier; a first feedback circuit coupled between an input terminal of the main amplifier and an output terminal of the main amplifier; an input coupling circuit coupled between the input terminal of the main amplifier and a first node; and an amplifying feedback circuit coupled between the output terminal of the main amplifier and the first node, wherein the first feedback circuit and the amplifying feedback circuit are negative feedback circuits.

Abstract: Disclosed is a semiconductor package comprising an interposer substrate having first and second surfaces opposite each other and including a wiring layer adjacent to the first surface, a semiconductor chip on the first surface of the interposer substrate, a passivation layer on the first surface of the interposer substrate and covering the semiconductor chip, and redistribution patterns in the passivation layer and connected to the semiconductor chip. The semiconductor chip has third and fourth surfaces opposite to each other. The third surface of the semiconductor chip faces the first surface of the interposer substrate. The redistribution patterns are connected to the fourth surface of the semiconductor chip. The semiconductor chip includes chip pads adjacent to the third surface and chip through electrodes connected to the chip pads. Each of the chip pads is directly bonded to a corresponding one of wiring patterns in the wiring layer.

Abstract: A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.

Abstract: Described herein are compositions, and more particularly to alloy compositions and articles formed with the alloy compositions. The alloy compositions are broadly applicable in applications requiring alloys with improved oxidation resistance, reduced retained delta ferrite, and/or improved rupture ductility.

Abstract: Disclosed is a semiconductor package comprising an interposer substrate having first and second surfaces opposite each other and including a wiring layer adjacent to the first surface, a semiconductor chip on the first surface of the interposer substrate, a passivation layer on the first surface of the interposer substrate and covering the semiconductor chip, and redistribution patterns in the passivation layer and connected to the semiconductor chip. The semiconductor chip has third and fourth surfaces opposite to each other. The third surface of the semiconductor chip faces the first surface of the interposer substrate. The redistribution patterns are connected to the fourth surface of the semiconductor chip. The semiconductor chip includes chip pads adjacent to the third surface and chip through electrodes connected to the chip pads. Each of the chip pads is directly bonded to a corresponding one of wiring patterns in the wiring layer.

Abstract: A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.

Abstract: A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.

Abstract: The present invention relates to a novel compound having inhibitory activity against pendrin, and pharmaceutical uses thereof, and provides a compound represented by formula 1 below, an E- or Z-isomer thereof, an optical isomer thereof, a precursor thereof, a pharmaceutically acceptable salt thereof, a solvate thereof or a mixture of two or more isomers thereof, and a composition for preventing, relieving or treating respiratory diseases and a diuretic composition, each composition utilizing the inhibitory activity of the compound against pendrin.

Abstract: An integrated circuit device includes: a semiconductor on insulator (SOI) substrate layer including a base substrate layer, an insulating substrate layer, and a cover substrate layer; a semiconductor substrate layer; a plurality of first fin-type active areas and a plurality of second fin-type active areas each defined by a plurality of trenches, and extending in a first horizontal direction, in above the SOI substrate layer and the semiconductor substrate layer, respectively; a plurality of nanosheet stacked structures comprising nanosheets extending in parallel with each other and spaced apart from upper surfaces of the plurality of first fin-type active areas and the plurality of second fin-type active areas; a plurality of first source/drain regions extending into the SOI substrate layer; and a plurality of second source/drain regions extending into the semiconductor substrate layer. Lower surfaces of the first and second source/drain regions may not be coplanar with each other.

Abstract: The present application provides a replaceable galvanic protection anode system for preventing and limiting the effects of liberation and damage to airfoils in a gas turbine, wherein turbine components are covered by a sacrificial material. The galvanic protection layer of the replaceable anodes may include a sacrificial material, such as aluminum, wherein the material provides corrosion resistance to the substrate. Additionally, the galvanic protection layer may include a sacrificial conductive material insert for increasing the conductivity of the sacrificial material and further improve the corrosion resistance of the replaceable anodes.

Abstract: The memory device includes a clock receiver receiving an external clock signal, a transmitter receiving first to Nth data in parallel and sequentially outputting the first to Nth data based on first to Nth clock signals including different phases, and a QEC circuit correcting a skew between the first to Nth clock signals, wherein the external clock signal includes a same frequency as the first to Nth clock signals, and the QEC circuit selectively receives the first clock signal among the first to Nth clock signals, generates the second clock signal including a phase different from a phase of the first clock signal based on a delay operation with respect to the first clock signal, and corrects the skew between the first to Nth clock signals by performing a phase comparison between the first to Nth clock signals generated based on the first and second clock signals.

Abstract: A transmitter configured to receive first to N-th data in parallel and sequentially output the first to N-th data in response to first to N-th clock signals having different phases from each other, where N is an integer of at least 2, the transmitter including first to N-th data selectors including a first data selector and a second data selector in correspondence to the first to N-th data, each of the first to N-th data selectors being configured to perform a logical operation on one of the first to N-th data and the first to N-th clock signals and output a plurality of data selection signals, a first pre-driver in correspondence to at least two data selectors among the first to N-th data selectors, the first pre-driver being configured to receive the plurality of data selection signals from the at least two data selectors.

Abstract: Discussed is a cradle for a wireless audio device. The cradle can include a casing including a seating groove for seating the wireless audio device, wherein the casing is able to be opened and closed, a transceiver disposed in the casing, a switch formed in a part of the casing, and an external device interface including an input terminal formed in another part of the casing, wherein in response to a first cable being connected to the input terminal in a wired connection mode, one of the transceiver and the external device interface performs a bi-directional wireless audio transmission for audio signal exchange with the wireless audio device, and wherein in response to a second cable being connected to the input terminal in the wired connection mode, one of the transceiver and the external device interface performs a unidirectional wireless audio transmission for audio transmission to the wireless audio device.