Patents by Inventor Jurgen H. Daniel

Jurgen H. Daniel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170237003
    Abstract: An embodiment is a method and apparatus to treat surface of polymer for printing. Surface of a polymer having a surface energy modified for a time period to control a feature characteristic and/or provide a hysteresis behavior. A material is printed on the surface to form a circuit pattern having at least one of the controlled feature characteristic and the hysteresis behavior.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Inventors: Tse Nga Ng, Ana Claudia Arias, Jurgen H. Daniel
  • Patent number: 9666815
    Abstract: An embodiment is a method and apparatus to treat surface of polymer for printing. Surface of a polymer having a surface energy modified for a time period to control a feature characteristic and/or provide a hysteresis behavior. A material is printed on the surface to form a circuit pattern having at least one of the controlled feature characteristic and the hysteresis behavior.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: May 30, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Ana Claudia Arias, Jurgen H. Daniel
  • Patent number: 9554475
    Abstract: A method of manufacturing a flexible electronics module includes mounting at least two functional components onto a flexible substrate, forming stretchable electrical interconnects configured to provide connection between the two functional components, and cutting shapes into the flexible substrate to increase an ability of the flexible substrate to stretch and flex, wherein the electrical interconnects to the functional components are placed to avoid the shapes.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: January 24, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventor: Jurgen H. Daniel
  • Patent number: 9202683
    Abstract: A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: December 1, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 9041123
    Abstract: A method and structures to achieve improved TFTs and high fill-factor pixel circuits are provided. This system relies on the fact that jet-printed lines have print accuracy, which means the location and the definition of the printed lines and dots is high. The edge of a printed line is well defined if the printing conditions are optimized. This technique utilizes the accurate definition and placement of the edges of printed lines of conductors and insulators to define small features and improved structures.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: May 26, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 9029245
    Abstract: A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: May 12, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 8976093
    Abstract: An interactive card or the like employs a piezoelectric charge generator (piezo-strip) for temporarily driving an indicator. The piezo-strip may be displaced (bent) in order to generate charge to drive the indicator. Printed electronic processes are utilized to produce the indicator and/or the piezoelectric charge generator The need for a printed battery or supplemental power source is obviated. The card may carry printed indicia which corresponds to the states of the indicator (e.g., indication of a test answer selection). Multiple display elements and selector switches may provide multiple indicator states. Multiple piezo-strips may provide a selection function as well as a rest function. Applications include business cards, greeting cards and novelty items, toys and games, advertising and promotions, testing and education, sensors, and so forth.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: March 10, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Patent number: 8959734
    Abstract: An interactive card or the like employs a piezoelectric charge generator (piezo-strip) for temporarily driving an indicator. The piezo-strip may be displaced (bent) in order to generate charge to drive the indicator. Printed electronic processes are utilized to produce the indicator and/or the piezoelectric charge generator. An indicator is formed on a substrate by way of a printed electronics process. A displaceable region of piezoelectric material associated with the said substrate is formed by way of a printed electronics process. Electrical interconnections are formed on said substrate by way of a printed electronics process. The electrical interconnections connecting said indicator and said first region of piezoelectric material such that displacement of said first region of piezoelectric material generates a voltage therein that is provided to said indicator in order to actuate said indicator and thereby indicate the displacement of said first region of piezoelectric material.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: February 24, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20140176507
    Abstract: An electronic sensor device, powered by a piezoelectric source and including an electronic element, is provided. The device may be used to test for the presence of substance such as a gas, a liquid, a chemical substance or a biological substance, etc. When the device is exposed to the substance, the electronic state (resistance/capacitance) of the electronic element (such as a transistor) changes (e.g. impacts the color of a connected display element) to allow for visual detection of the substance by a user.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventor: Jurgen H. Daniel
  • Patent number: 8748242
    Abstract: A thin film transistor (TFT) structure is implemented. This embodiment is much less sensitive than conventional TFTs to alignment errors and substrate distortion. In such a configuration, there is no need to define gate features, so the layout is simplified. Moreover, the gate layer may be patterned by several inexpensive printing or non-printing methods.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: June 10, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Publication number: 20140117448
    Abstract: A method and structures to achieve improved TFTs and high fill-factor pixel circuits are provided. This system relies on the fact that jet-printed lines have print accuracy, which means the location and the definition of the printed lines and dots is high. The edge of a printed line is well defined if the printing conditions are optimized. This technique utilizes the accurate definition and placement of the edges of printed lines of conductors and insulators to define small features and improved structures.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 1, 2014
    Applicant: Palo Alto Research Center Incorported
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 8698645
    Abstract: A method for event sensing employs an event sensor comprising a detector and circuitry, connected thereto, produced by printed electronics processes. Operation may rely on fixed characteristic devices, such as a series resistive chain, or variable characteristic devices such as thin film transistors (TFTs) and the like. A pulse is input to the printed electronic circuitry. The printed electronic circuitry divides the pulse across the various devices comprising the circuitry according to pulse amplitude and pulse width. The circuitry provides an output signal which is provided to a plurality of display elements capable of indicating the division performed at the printed electronic circuitry. In one embodiment, each display element is an electrophoretic display which changes contrast as a function of the applied voltage. Not only the pulse amplitude and pulse width, but the number of pulses applied to the printed circuitry (i.e., sensed by the detector) may be indicated.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: April 15, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Tse Hga Ng
  • Publication number: 20140094003
    Abstract: A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g.
    Type: Application
    Filed: December 2, 2013
    Publication date: April 3, 2014
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 8685216
    Abstract: An apparatus for merging and mixing two droplets using electrostatic forces includes a substrate on which are disposed a first originating electrode, a center electrode, and a second originating electrode. The electrodes are disposed such that a first gap is formed between the first originating electrode and the center electrode and a second gap is formed between the second originating electrode and the center electrode. A dielectric material surrounds the electrodes on the substrate. A first droplet is deposited asymmetrically across the first gap, and a second droplet is deposited asymmetrically across the second gap. Voltage potentials are placed across the first gap and second gap, respectively, whereby each droplet is moved toward the other such that they collide together, causing the droplets to merge and mix, and causing oscillations within the collided droplet.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: April 1, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Dirk De Bruyker, Michael I. Recht, Jürgen H. Daniel
  • Publication number: 20140087528
    Abstract: A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 27, 2014
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 8680401
    Abstract: A printed circuit is produced with a base circuit and a number of optional circuit elements. One or more of the optional circuit elements may be added to the base circuit to determine or change the characteristics of the base circuit. Alternatively, one or more of the optional circuit elements may be removed from the base circuit to determine or change the characteristics of the base circuit. The base circuit and optional circuit elements may be printed on a single substrate. Mechanisms may be provided to facilitate the separation of the optional elements form the substrate either to introduce them into the base circuit or remove them from the base circuit to change the characteristics of the base circuit. A simple, low-cost, robust, and easy to use base circuit and optional circuit element is provided.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: March 25, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Jurgen H. Daniel, Ana Claudia Arias, Brent Krusor
  • Patent number: 8624330
    Abstract: A method and structures to achieve improved TFTs and high fill-factor pixel circuits are provided. This system relies on the fact that jet-printed lines have print accuracy, which means the location and the definition of the printed lines and dots is high. The edge of a printed line is well defined if the printing conditions are optimized. This technique utilizes the accurate definition and placement of the edges of printed lines of conductors and insulators to define small features and improved structures.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 7, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 8624304
    Abstract: A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: January 7, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Ana Claudia Arias
  • Patent number: 8624753
    Abstract: An event sensor device comprises a detector and circuitry, connected thereto, produced by printed electronics processes. This circuitry may be comprised of fixed characteristic devices, such as a series resistive chain, or variable characteristic devices such as thin film transistors (TFTs) and the like. A pulse is input to the printed electronic circuitry. The printed electronic circuitry divides the pulse across the various devices comprising the circuitry according to pulse amplitude and pulse width. The circuitry provides an output signal which is provided to a plurality of display elements, which are capable of indicating the division performed at the printed electronic circuitry. In one embodiment, each display element is an electrophoretic display which changes contrast as a function of the applied voltage. Not only the pulse amplitude and pulse width, but the number of pulses applied to the printed circuitry (i.e., sensed by the detector) may be indicated.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: January 7, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20130305529
    Abstract: A method of manufacturing a flexible electronics module includes mounting at least two functional components onto a flexible substrate, forming electrical interconnects configured to provide connection between the two functional components, and perforating the flexible substrate with cuts configured to increase stretchability of the substrate.
    Type: Application
    Filed: July 29, 2013
    Publication date: November 21, 2013
    Applicant: Palo Alto Research Center Incorporated
    Inventor: Jurgen H. Daniel