Patents by Inventor Jurgen Hogerl
Jurgen Hogerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250185208Abstract: A heat exchanger for a power module for an inverter system includes a body that defines an inlet and an outlet. At least one enclosed channel is integrally formed within the body. The at least one enclosed channel is in fluid communication with the inlet and the outlet. A power module for an inverter system includes a substrate, the heat exchanger, and a cover that at least partially covers the substrate and the heat exchanger.Type: ApplicationFiled: November 26, 2024Publication date: June 5, 2025Applicants: NEXPERIA B.V., Nexperia Technology (Shanghai) Ltd.Inventors: Siu Lung Ng, Jürgen Högerl
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Publication number: 20240055310Abstract: A semiconductor package includes a first substrate, a semiconductor chip, a leadframe comprising at least one lead, and an encapsulant. A lower main face of the encapsulant includes a first portion extending in a first plane, a second portion extending in a second plane, a third portion extending in a first transition zone between the first plane and the second plane, and a fourth portion extending in a second transition zone between the second plane and the at least one lead. Both the first portion of the encapsulant and a lower main face of the first substrate extend in the first plane forming a lower heat dissipation surface of the package. The second portion, the third portion and the fourth portion of the encapsulant are dimensioned so as to keep a first predefined minimum distance between the first portion of the encapsulant and the at least one lead.Type: ApplicationFiled: October 9, 2023Publication date: February 15, 2024Inventor: Jürgen HÖGERL
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Patent number: 9847274Abstract: According to an exemplary aspect an electronic module is provided, wherein the electronic module comprises an electronic chip comprising at least one electronic component, a spacing element comprising a main surface arranged on the electronic chip and being in thermally conductive connection with the at least one electronic component, and a mold compound at least partially enclosing the electronic chip and the spacing element, wherein the spacing element comprises a lateral surface which is in contact to the mould compound and comprises surface structures.Type: GrantFiled: December 12, 2016Date of Patent: December 19, 2017Assignee: Infineon Technologies AGInventors: Frank Winter, Ottmar Geitner, Ivan Nikitin, Jürgen Högerl
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Publication number: 20170092563Abstract: According to an exemplary aspect an electronic module is provided, wherein the electronic module comprises an electronic chip comprising at least one electronic component, a spacing element comprising a main surface arranged on the electronic chip and being in thermally conductive connection with the at least one electronic component, and a mold compound at least partially enclosing the electronic chip and the spacing element, wherein the spacing element comprises a lateral surface which is in contact to the mould compound and comprises surface structures.Type: ApplicationFiled: December 12, 2016Publication date: March 30, 2017Inventors: Frank WINTER, Ottmar GEITNER, Ivan NIKITIN, Jürgen HÖGERL
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Patent number: 9385111Abstract: An electronic component which comprises an electrically conductive mounting structure, an electronic chip on the mounting structure, an electrically conductive redistribution structure on the electronic chip, and a periphery connection structure electrically coupled to the redistribution structure and being configured for connecting the electronic component to an electronic periphery, wherein at least one of the electrically conductive mounting structure and the electrically conductive redistribution structure comprises electrically conductive inserts in an electrically insulating matrix.Type: GrantFiled: November 22, 2013Date of Patent: July 5, 2016Assignee: Infineon Technologies Austria AGInventors: Manfred Mengel, Edward Fürgut, Ralf Otremba, Jürgen Högerl
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Patent number: 7500305Abstract: A novel method and placement system are configured for populating a substrate with an electronic component. The placement system has a substrate holding device for receiving the substrate, a wafer holding device above the substrate holding device serving for receiving a wafer holding frame, and a vacuum forceps holding device arranged above the wafer holding device. The wafer holding frame can receive a complete semiconductor wafer divided into electronic components.Type: GrantFiled: February 7, 2006Date of Patent: March 10, 2009Assignee: Qimonda AGInventors: Jürgen Högerl, Jens Pohl, Uta Sasse, Ingo Wennemuth
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Patent number: 7069647Abstract: A novel method and placement system are configured for populating a substrate with an electronic component. The placement system has a substrate holding device for receiving the substrate, a wafer holding device above the substrate holding device serving for receiving a wafer holding frame, and a vacuum forceps holding device arranged above the wafer holding device. The wafer holding frame can receive a complete semiconductor wafer divided into electronic components.Type: GrantFiled: November 3, 2003Date of Patent: July 4, 2006Assignee: Infineon Technologies AGInventors: Jürgen Högerl, Jens Pohl, Uta Sasse, Ingo Wennemuth
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Publication number: 20060123624Abstract: A novel method and placement system are configured for populating a substrate with an electronic component. The placement system has a substrate holding device for receiving the substrate, a wafer holding device above the substrate holding device serving for receiving a wafer holding frame, and a vacuum forceps holding device arranged above the wafer holding device. The wafer holding frame can receive a complete semiconductor wafer divided into electronic components.Type: ApplicationFiled: February 7, 2006Publication date: June 15, 2006Inventors: Jurgen Hogerl, Jens Pohl, Uta Sasse, Ingo Wennemuth
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Patent number: 6960829Abstract: A semiconductor wafer is produced with an outer contact layer applied to the entire surface of an insulating layer and a rewiring layer embedded therein. At the same time, fuses are short-circuited. After the outer contact layer has been patterned and a passivation layer has been applied, outer contacts and short-circuit lines are uncovered. Outer contacts are introduced into passage openings in the passivation layer. The semiconductor structures are tested and predetermined short-circuit lines are interrupted. Then, the semiconductor wafer is diced into semiconductor chips.Type: GrantFiled: March 28, 2003Date of Patent: November 1, 2005Assignee: Infineon Technologies AGInventor: Jürgen Högerl
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Patent number: 6851598Abstract: An electronic component with at least one semiconductor chip and a wiring layer are described. The wiring layer has elastic contact elements of low mechanical strength in the spatial directions x, y and z, which can be electrically connected to corresponding contact terminal areas of a printed circuit board. The semiconductor chip or the wiring layer additionally has at least two spacers for the mechanical connection to a printed circuit board. A method for producing the electronic component is also described.Type: GrantFiled: July 25, 2002Date of Patent: February 8, 2005Assignee: Infineon Technologies AGInventors: Uta Gebauer, Harry Hedler, Jürgen Högerl, Volker Strutz
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Patent number: 6774483Abstract: A semiconductor assembly includes a module holder and a semiconductor module, which has a board substrate with conductor tracks and one or more unpackaged semiconductor chips mounted on the substrate, which are connected to conductor tracks on the substrate by electrical contacts. The substrate has at one edge at least one contact strip with connection contact areas, which are connected to at least some of the conductor tracks. The module holder has a plug-in connection for the electrical connection to other components, at least one mating contact strip for the connection to the contact strip of the at least one semiconductor module and electrical conductors between the contact areas of the at least one semiconductor module and electrical contacts of the plug-in connection. The configuration allows semiconductor modules to be connected to the outside world in an economical way.Type: GrantFiled: April 16, 2003Date of Patent: August 10, 2004Assignee: Infineon Technologies AGInventors: Jürgen Högerl, Erich Syri
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Publication number: 20040111875Abstract: A novel method and placement system are configured for populating a substrate with an electronic component. The placement system has a substrate holding device for receiving the substrate, a wafer holding device above the substrate holding device serving for receiving a wafer holding frame, and a vacuum forceps holding device arranged above the wafer holding device. The wafer holding frame can receive a complete semiconductor wafer divided into electronic components.Type: ApplicationFiled: November 3, 2003Publication date: June 17, 2004Inventors: Jurgen Hogerl, Jens Pohl, Uta Sasse, Ingo Wennemuth
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Patent number: 6737581Abstract: A circuit configuration for reliably and simply interconnecting circuit modules includes a connection carrier and circuit modules disposed essentially one above another approximately in a stack. Each of the circuit modules has a connecting device for externally and electrically bonding the circuit modules. The connecting device has at least one series configuration of connecting elements disposed essentially in a plane. The connecting elements are disposed on the connection carrier. The connecting device of at least one of the circuit modules is at least partially electrically connected to another connecting device of at least one different one of the circuit modules in direct mechanical and electrical contact.Type: GrantFiled: May 16, 2001Date of Patent: May 18, 2004Assignee: Infineon Technologies AGInventor: Jürgen Högerl
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Patent number: 6665182Abstract: The invention relates to a module unit for memory modules and to a method for producing the module unit. A module unit of this type has at least one main module and submodules. The modules are arranged in a star-shaped manner and are arranged radially with their inner contact strips in slots of a central plug connector. The module unit has a substantially cylindrical housing, from which an outer contact strip of the main module protrudes.Type: GrantFiled: June 27, 2002Date of Patent: December 16, 2003Assignee: Infineon Technologies AGInventor: Jürgen Högerl
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Patent number: 6646333Abstract: A semiconductor module has a plurality of semiconductor chips which are provide on chip carriers in a housing. At least some of the semiconductor chips are disposed one above the other and there are conductive connections between the chip carriers of the semiconductor chips disposed one above the other. The conductive connections are formed by plug-in connections and extend through openings in the chip carriers. The openings may be lined with a conductive layer. In an alternative embodiment intermediate layers are provided between the semiconductor chips disposed one above the other. The intermediate layers have conductive projections which engage in the openings in the chip carriers for forming conductive connections.Type: GrantFiled: May 22, 2000Date of Patent: November 11, 2003Assignee: Infineon Technologies AGInventor: Jürgen Högerl
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Publication number: 20030193085Abstract: A semiconductor assembly includes a module holder and a semiconductor module, which has a board substrate with conductor tracks and one or more unpackaged semiconductor chips mounted on the substrate, which are connected to conductor tracks on the substrate by electrical contacts. The substrate has at one edge at least one contact strip with connection contact areas, which are connected to at least some of the conductor tracks. The module holder has a plug-in connection for the electrical connection to other components, at least one mating contact strip for the connection to the contact strip of the at least one semiconductor module and electrical conductors between the contact areas of the at least one semiconductor module and electrical contacts of the plug-in connection. The configuration allows semiconductor modules to be connected to the outside world in an economical way.Type: ApplicationFiled: April 16, 2003Publication date: October 16, 2003Inventors: Jurgen Hogerl, Erich Syri
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Publication number: 20030186487Abstract: A semiconductor wafer is produced with an outer contact layer applied to the entire surface of an insulating layer and a rewiring layer embedded therein. At the same time, fuses are short-circuited. After the outer contact layer has been patterned and a passivation layer has been applied, outer contacts and short-circuit lines are uncovered. Outer contacts are introduced into passage openings in the passivation layer. The semiconductor structures are tested and predetermined short-circuit lines are interrupted. Then, the semiconductor wafer is diced into semiconductor chips.Type: ApplicationFiled: March 28, 2003Publication date: October 2, 2003Inventor: Jurgen Hogerl
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Patent number: 6576995Abstract: A housing for semiconductor chips includes a plastic base substrate having a region for accommodating a chip and substrate sides having a patterned metallization layer. One of the sides contacts a chip and another contacts an external electrical connection. Each chip has front and rear sides and at least one chip contact on each side. Two or more pads are formed in the patterned metallization layer on one of the base substrate sides. One of the pads is connected to a front side chip contact and another is connected to a rear side chip contact. At least one pad is formed in the patterned metallization layer on the other base substrate side and is connected to the external electrical connection. One of the two pads is connected to a chip contact through the bonding wire, and another of the two pads is directly applied to another chip contact.Type: GrantFiled: April 10, 2001Date of Patent: June 10, 2003Assignee: Infineon Technologies AGInventors: Jürgen Högerl, Stefan Paulus
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Publication number: 20030038157Abstract: An electronic component with at least one semiconductor chip and a wiring layer are described. The wiring layer has elastic contact elements of low mechanical strength in the spatial directions x, y and z, which can be electrically connected to corresponding contact terminal areas of a printed circuit board. The semiconductor chip or the wiring layer additionally has at least two spacers for the mechanical connection to a printed circuit board. A method for producing the electronic component is also described.Type: ApplicationFiled: July 25, 2002Publication date: February 27, 2003Inventors: Uta Gebauer, Harry Hedler, Jurgen Hogerl, Volker Strutz
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Publication number: 20030012001Abstract: The invention relates to a module unit for memory modules and to a method for producing the module unit. A module unit of this type has at least one main module and submodules. The modules are arranged in a star-shaped manner and are arranged radially with their inner contact strips in slots of a central plug connector. The module unit has a substantially cylindrical housing, from which an outer contact strip of the main module protrudes.Type: ApplicationFiled: June 27, 2002Publication date: January 16, 2003Inventor: Jurgen Hogerl