Patents by Inventor Jurgen Hogerl

Jurgen Hogerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6507106
    Abstract: A semiconductor module of the type having a number of semiconductor chips disposed on a chip carrier has at least a second subset of the semiconductor chips disposed above a first subset and conductive connections between the semiconductor chips disposed one above another. The improvement includes flexible tapes forming conductive connections between the first subset of semiconductor chips and the second subset of semiconductor chips. Two of the flexible tapes originate from the first subset and lead to the second subset. The two flexible tapes respectively extend from a contact-making side of the first subset around respectively mutually opposite side faces of the first subset to the second subset.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: January 14, 2003
    Assignee: Infineon Technologies AG
    Inventor: Jürgen Högerl
  • Publication number: 20020050376
    Abstract: A circuit configuration for reliably and simply interconnecting circuit modules includes a connection carrier and circuit modules disposed essentially one above another approximately in a stack. Each of the circuit modules has a connecting device for externally and electrically bonding the circuit modules. The connecting device has at least one series configuration of connecting elements disposed essentially in a plane. The connecting elements are disposed on the connection carrier. The connecting device of at least one of the circuit modules is at least partially electrically connected to another connecting device of at least one different one of the circuit modules in direct mechanical and electrical contact.
    Type: Application
    Filed: May 16, 2001
    Publication date: May 2, 2002
    Inventor: Jurgen Hogerl
  • Publication number: 20010030359
    Abstract: A housing for semiconductor chips includes a plastic base substrate having a region for accommodating a chip and substrate sides having a patterned metallization layer. One of the sides contacts a chip and another contacts an external electrical connection. Each chip has front and rear sides and at least one chip contact on each side. Two or more pads are formed in the patterned metallization layer on one of the base substrate sides. One of the pads is connected to a front side chip contact and another is connected to a rear side chip contact. At least one pad is formed in the patterned metallization layer on the other base substrate side and is connected to the external electrical connection. One of the two pads is connected to a chip contact through the bonding wire, and another of the two pads is directly applied to another chip contact.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 18, 2001
    Inventors: Jurgen Hogerl, Stefan Paulus