Patents by Inventor Jurgen Leib
Jurgen Leib has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10954591Abstract: The invention relates to a method for producing a structured coating on a substrate, wherein the method comprises the following steps: providing a substrate having a surface to be coated and producing a structured coating on the surface of the substrate to be coated by depositing at least one evaporation coating material, namely aluminium oxide, silicon dioxide, silicon nitride, or titanium dioxide, on the surface of the substrate to be coated by means of thermal evaporation of the at least one evaporation coating material and using additive structuring. The invention further relates to a coated substrate and a semi-finished product having a coated substrate.Type: GrantFiled: July 22, 2010Date of Patent: March 23, 2021Assignee: MSG LITHOGLAS AGInventors: Jürgen Leib, Ulli Hansen, Simon Maus
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Patent number: 8966748Abstract: The invention relates to a method for manufacturing an arrangement with a component on a carrier substrate, wherein the method encompasses the following steps: Manufacturing spacer elements on the rear side of a cover substrate, arranging a component on a cover surface of a carrier substrate, and arranging the spacer elements formed on the carrier substrate so as to situate the component in the at least one hollow space and close the latter. In addition, the invention relates to an arrangement, a method for manufacturing a semi-finished product for a component arrangement, as well as a semi-finished product for a component arrangement.Type: GrantFiled: September 24, 2010Date of Patent: March 3, 2015Assignee: MSG Lithoglas AGInventors: Jürgen Leib, Simon Maus, Ulli Hansen
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Patent number: 8742588Abstract: The present invention provides a method of forming a via hole (9), or a via (7), from a lower side (5) of a substrate (3) for electronic devices towards an upper side (4) of a substrate (3) at least partly through the substrate (3). The method comprises the steps of: etching a first lengthwise portion (11) of the via hole (9) and etching a second lengthwise portion (12) of the via hole (9); whereby the first lengthwise portion (11) and the second lengthwise portion (12) substantially form the via hole (9) and a constriction (23) is formed in the via hole (9). The constriction (23) defines an aperture (24) of the via hole (9) and the method further comprises the step of opening the via hole (9) by etching, with the constriction (23) functioning as an etch mask. A via is formed by at least partly filling the via hole with conductive material. A substrate for electronic devices comprising a via is also provided.Type: GrantFiled: October 15, 2009Date of Patent: June 3, 2014Assignee: ÅAC Microtec ABInventors: Peter Nilsson, Jürgen Leib, Robert Thorslund
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Patent number: 8659206Abstract: The invention relates to a method for producing a dielectric layer (3) in an electroacoustic component (1), in particular a component operating with acoustic surface waves or bulk acoustic waves, comprising a substrate and an associated electrode structure, in which the dielectric layer (3) is formed at least in part by depositing by a thermal vapor deposition process at least one evaporation material selected from the following group of layer vaporising materials: vapor deposition glass material such as borosilicate glass, silicon nitride and aluminum oxide. The invention further relates to an electroacoustic component.Type: GrantFiled: July 23, 2009Date of Patent: February 25, 2014Assignee: MSG Lithoglas AGInventors: Ulli Hansen, Jürgen Leib, Simon Maus
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Patent number: 8349707Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.Type: GrantFiled: September 30, 2010Date of Patent: January 8, 2013Assignee: Wafer-Level Packaging Portfolio LLCInventors: Dipl.-Ing. Florian Bieck, Jürgen Leib
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Publication number: 20120314393Abstract: The invention relates to a method for manufacturing an arrangement with a component on a carrier substrate, wherein the method encompasses the following steps: Manufacturing spacer elements on the rear side of a cover substrate, arranging a component on a cover surface of a carrier substrate, and arranging the spacer elements formed on the carrier substrate so as to situate the component in the at least one hollow space and close the latter. In addition, the invention relates to an arrangement, a method for manufacturing a semi-finished product for a component arrangement, as well as a semi-finished product for a component arrangement.Type: ApplicationFiled: September 24, 2010Publication date: December 13, 2012Applicant: MSG LITHOGLAS AGInventors: Jürgen Leib, Simon Maus, Ulli Hansen
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Patent number: 8273671Abstract: A glass material for producing insulation layers is provided. The glass material can improve the radio-frequency properties of radio-frequency substrates or radio-frequency conductor arrangements. In one embodiment, the glass material for producing insulation layers for radio-frequency substrates or radio-frequency conductor arrangements is an applied layer with a layer thickness in the range between 0.05 ?m and 5?mm and has a loss factor tan ? of less than or equal to 70*10?4 in at least a frequency range above 1 GHz.Type: GrantFiled: May 23, 2003Date of Patent: September 25, 2012Assignee: Schott AGInventors: Jürgen Leib, Dietrich Mund
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Publication number: 20120231212Abstract: The invention relates to a method for producing a structured coating on a substrate, wherein the method comprises the following steps: providing a substrate having a surface to be coated and producing a structured coating on the surface of the substrate to be coated by depositing at least one evaporation coating material, namely aluminium oxide, silicon dioxide, silicon nitride, or titanium dioxide, on the surface of the substrate to be coated by means of thermal evaporation of the at least one evaporation coating material and using additive structuring. The invention further relates to a coated substrate and a semi-finished product having a coated substrate.Type: ApplicationFiled: July 22, 2010Publication date: September 13, 2012Inventors: Jürgen Leib, Ulli Hansen, Simon Maus
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Patent number: 8114304Abstract: In order to achieve an integration of functional structures into the housing of electronic components, provision is made of a method for producing an electronic component comprising at least one semiconductor element having at least one sensor-technologically active and/or emitting device on at least one side, the method comprising the following steps: provision of at least one die on a wafer, production of at least one patterned support having at least one structure which is functional for the sensor-technologically active and/or emitting device, joining together of the wafer with the at least one support, so that that side of the die which has the sensor-technologically active and/or emitting device faces the support, separation of the die.Type: GrantFiled: November 22, 2006Date of Patent: February 14, 2012Assignee: Wafer-Level Packaging Portfolio LLCInventors: Jürgen Leib, Florian Bieck
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Publication number: 20110201197Abstract: The present invention provides a method of forming a via hole (9), or a via (7), from a lower side (5) of a substrate (3) for electronic devices towards an upper side (4) of a substrate (3) at least partly through the substrate (3). The method comprises the steps of: etching a first lengthwise portion (1 1) of the via hole (9) and etching a second lengthwise portion (12) of the via hole (9); whereby the first lengthwise portion (11) and the second lengthwise portion (12) substantially form the via hole (9) and a constriction (23) is formed in the via hole (9). The constriction (23) defines an aperture (24) of the via hole (9) and the method further comprises the step of opening the via hole (9) by etching, with the constriction (23) functioning as an etch mask. A via is formed by at least partly filling the via hole with conductive material. A substrate for electronic devices comprising a via is also provided.Type: ApplicationFiled: October 15, 2009Publication date: August 18, 2011Inventors: Peter Nilsson, Jürgen Leib, Robert Thorslund
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Publication number: 20110175487Abstract: The invention relates to a method for producing a dielectric layer (3) in an electroacoustic component (1), in particular a component operating with acoustic surface waves or bulk acoustic waves, comprising a substrate and an associated electrode structure, in which the dielectric layer (3) is formed at least in part by depositing by a thermal vapour deposition process at least one evaporation material selected from the following group of layer vaporising materials: vapour deposition glass material such as borosilicate glass, silicon nitride and aluminium oxide. The invention further relates to an electroacoustic component.Type: ApplicationFiled: July 23, 2009Publication date: July 21, 2011Inventors: Ulli Hansen, Jürgen Leib, Simon Maus
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Patent number: 7880179Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.Type: GrantFiled: November 20, 2009Date of Patent: February 1, 2011Assignee: Wafer-Level Packaging Portfolio LLCInventors: Dipl.-Ing. Florian Bieck, Jürgen Leib
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Publication number: 20110021002Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.Type: ApplicationFiled: September 30, 2010Publication date: January 27, 2011Inventors: Dipl.-Ing. Florian Bieck, Jürgen Leib
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Patent number: 7863200Abstract: A process to encapsulate electronic modules in a manner which is substantially resistant to water diffusion yet is carried out at moderate temperatures below 300° C., preferably below 150° C. is provided. The process forms a housing for electronic modules, in particular sensors, integrated circuits and optoelectronic components. The process includes the steps of: providing a substrate, of which at least a first substrate side is to be encapsulated; providing a vapor-deposition glass source; arranging the first substrate side in such a manner with respect to the vapor-deposition glass source that the first substrate side can be vapor-coated; and vapor-coating the first substrate side with a glass layer.Type: GrantFiled: April 15, 2003Date of Patent: January 4, 2011Assignee: Schott AGInventors: Jürgen Leib, Dietrich Mund
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Patent number: 7825029Abstract: A method for the patterned coating of a substrate with at least one surface is provided. The method is suitable for the rapid and inexpensive production of precise patterns. The method includes the steps of: producing at least one negatively patterned first coating on the at least one surface, depositing at least one second layer, which includes a material with a vitreous structure, on the surface, and at least partially removing the first coating.Type: GrantFiled: April 15, 2003Date of Patent: November 2, 2010Assignee: Schott AGInventors: Jurgen Leib, Florian Bieck, Dietrich Mund
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Patent number: 7821106Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.Type: GrantFiled: March 4, 2008Date of Patent: October 26, 2010Assignee: Schott AGInventors: Florian Bieck, Jürgen Leib
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Patent number: 7786002Abstract: The invention provides a process for producing a substrate having a conductor arrangement that is suitable for radio-frequency applications, with improved radio-frequency properties. For this purpose, the process includes the steps of: depositing a structured glass layer having at least one opening over a contact-connection region by evaporation coating on the substrate and applying at least one conductor structure to the structured glass layer so that the at least one conductor has electrical contact with the contact-connection region.Type: GrantFiled: May 23, 2003Date of Patent: August 31, 2010Assignee: Schott AGInventors: Jürgen Leib, Dietrich Mund
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Publication number: 20100130246Abstract: The invention generally concerns optical systems and, in particular, a method and device for joining at least one first and one second optical element to an optical composite element, as well as an optical composite element itself. In order to produce optical systems having at least two optical elements more easily and more economically, the invention provides a method for joining at least one first and one second optical element, in which the first optical element contains a first glass or a crystalline material, the second optical element contains a second glass, and the first glass or the crystalline material has a transformation temperature Tg1 or a melting temperature that differs from the transformation temperature Tg2 of the second glass, and at least the glass of the second optical element is heated and brought into contact with the glass or with the crystalline material of the first optical element.Type: ApplicationFiled: August 5, 2005Publication date: May 27, 2010Applicant: SCHOTT AGInventors: Ralf Biertümpfel, Piotr Rosanka, Ulrike Stöhr, Bernd Wölfing, Wolfgang Semar, Jürgen Leib
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Patent number: 7700957Abstract: The invention proposes a process for producing electrical contact connections for at least one component which is integrated in a substrate material, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.Type: GrantFiled: September 22, 2004Date of Patent: April 20, 2010Assignee: Schott AGInventors: Florian Bieck, Jürgen Leib
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Publication number: 20100065883Abstract: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages.Type: ApplicationFiled: November 20, 2009Publication date: March 18, 2010Inventors: Dipl.-Ing. Florian Bieck, Jurgen Leib