Patents by Inventor Juri Kato

Juri Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070262380
    Abstract: A semiconductor device comprises: a semiconductor substrate including a SOI region and a bulk region; a first element formed in the SOI region; a second element formed in the bulk region; a first element isolation layer including a trench structure; and a second element isolation layer including a LOCOS structure. The first element is separated from the second element by the first isolation layer and the second isolation layer.
    Type: Application
    Filed: April 30, 2007
    Publication date: November 15, 2007
    Applicant: Seiko Epson Corporation
    Inventors: Juri Kato, Kei Kanemoto
  • Patent number: 7271447
    Abstract: A semiconductor substrate includes a first semiconductor layer that is formed on a semiconductor base substrate, a second semiconductor layer that is formed on the first semiconductor layer and that has an etching selection ratio smaller than that of the first semiconductor layer, a cavity portion that is formed below the second semiconductor layer by removing a portion of the first semiconductor layer, a thermal oxidation film that is formed on the surface of the second semiconductor layer in the cavity portion, and a buried insulating film that is buried in the cavity portion.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: September 18, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Teruo Takizawa, Kei Kanemoto, Juri Kato, Toshiki Hara
  • Publication number: 20070194383
    Abstract: A semiconductor device, includes: a semiconductor layer, arranged, via an insulation layer, on a region of a part of a semiconductor substrate; a first circuit block formed on the semiconductor layer; and a second and a third circuit blocks formed on the semiconductor substrate, isolated from each other by the first circuit block.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 23, 2007
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20070132011
    Abstract: A semiconductor device includes a semiconductor layer formed on a semiconductor substrate by epitaxial growth, a first embedded insulating layer embedded in a first region between the semiconductor substrate and the substrate layer, and a second embedded insulating layer embedded in a second region between the semiconductor substrate and the semiconductor layer, wherein the first embedded insulating layer and the second embedded insulating layer are mutually different in at least either of effective work function and fixed charge amount.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 14, 2007
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Patent number: 7227264
    Abstract: Single-crystalline silicon layers 7a and 7b are selectively formed on LDD layers 5a and 5b by an epitaxial growth method. Opening sections 10a and 10b are formed, which expose a source layer 8 and a drain layer 8b, respectively, through an interlayer dielectric film 9 and the single-crystalline silicon layers 7a and 7b, respectively, and then, plugs 12a and 12b are formed in the opening sections 10a and 10b embedded through barrier metal films 11a and 11b, respectively.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: June 5, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20070080402
    Abstract: A semiconductor device includes a first insulator formed at a part under a semiconductor layer, a second insulator formed under the semiconductor layer in an arranged manner avoiding the first insulator and having a relative dielectric constant different from that of the first insulator, a backgate electrode formed under the first and second insulators, a gate electrode formed on the semiconductor layer, and a source layer and a drain layer formed in the semiconductor layer to be respectively arranged on opposite lateral sides of the gate electrode.
    Type: Application
    Filed: September 27, 2006
    Publication date: April 12, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Juri KATO
  • Publication number: 20070075380
    Abstract: A semiconductor device includes a semiconductor layer formed partially on a semiconductor substrate by epitaxial growth, an embedded oxide film embedded between the semiconductor substrate and the semiconductor layer, first and second gate electrodes disposed on sidewalls of the semiconductor layer, a source layer formed in the semiconductor layer and disposed in the first gate electrode, and a drain layer formed in the semiconductor layer and disposed in the second gate electrode, wherein the sidewalls of the semiconductor layer are film-forming surfaces of the epitaxial gowth.
    Type: Application
    Filed: September 27, 2006
    Publication date: April 5, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Juri KATO
  • Publication number: 20070076482
    Abstract: A nonvolatile semiconductor memory device includes a gate electrode provided on a channel region of a semiconductor layer and a floating gate provided on a back side of the semiconductor layer with a first insulating layer interposed therebetween.
    Type: Application
    Filed: September 27, 2006
    Publication date: April 5, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Juri Kato
  • Publication number: 20070075317
    Abstract: A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer; a second insulating layer formed on the first single-crystal semiconductor layer and having a film thickness smaller than a film thickness of the first insulating layer; a second single-crystal semiconductor layer formed on the second insulating layer; a gate electrode formed on the second single-crystal semiconductor layer; and source and drain layers that are formed on the second single-crystal semiconductor layer and arranged on respective sides of the gate electrode.
    Type: Application
    Filed: July 20, 2006
    Publication date: April 5, 2007
    Applicants: SEIKO EPSON CORPORATION, TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Juri Kato, Hideaki Oka, Kei Kanemoto, Toshiki Hara, Tetsushi Sakai
  • Publication number: 20070029617
    Abstract: A semiconductor device includes: a semiconductor layer provided with a P-channel field-effect transistor and an N-channel field-effect transistor that have a common gate electrode, a field plate provided to a back surface of the semiconductor layer with a first insulating layer therebetween and commonly for a channel of the P-channel field-effect transistor and a channel of the N-channel field-effect transistor, and a second insulating layer placed under the field plate.
    Type: Application
    Filed: July 10, 2006
    Publication date: February 8, 2007
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20070018246
    Abstract: A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer, a second insulating layer formed on the first single-crystal semiconductor layer, a second single-crystal semiconductor layer formed on the second insulating layer and having a film thickness smaller than a film thickness of the first single-crystal semiconductor layer, a gate electrode formed on the second single-crystal semiconductor layer, and source and drain layers that are formed on the second single-crystal semiconductor layer and arranged on respective sides of the gate electrode.
    Type: Application
    Filed: June 7, 2006
    Publication date: January 25, 2007
    Applicants: SEIKO EPSON CORPORATION, TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Juri Kato, Hideaki Oka, Kei Kanemoto, Toshiki Hara, Tetsushi Sakai
  • Publication number: 20060220128
    Abstract: A semiconductor substrate comprising a semiconductor base, a dielectric layer formed in at least a part of an area on the semiconductor base, and a single crystal semiconductor layers having mutually different film thicknesses, disposed on the dielectric layer and formed by epitaxial growth.
    Type: Application
    Filed: July 28, 2005
    Publication date: October 5, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20060202271
    Abstract: A semiconductor device includes a first power supply interconnect formed of a first single-crystal semiconductor layer and coupled to a first potential, and a second power supply interconnect formed of a second single-crystal semiconductor layer and coupled to a second potential, the second single-crystal semiconductor layer being deposited over the first single-crystal semiconductor layer.
    Type: Application
    Filed: March 9, 2006
    Publication date: September 14, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20060202276
    Abstract: A semiconductor device includes a semiconductor substrate in which an insulating layer is formed in a part of an region, a semiconductor layer is formed by epitaxial growth and located on the insulating layer, a first gate electrode is formed at the sidewall of the semiconductor layer, first source and drain regions are formed in the semiconductor layer and located at the side of the first gate electrode, a second electrode is formed on the semiconductor substrate, and second source and drain regions are formed in the semiconductor substrate and located at the side of the second gate electrode.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 14, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20060197163
    Abstract: A semiconductor device comprising: a semiconductor layer having a film formation face in a side wall, the side wall being film-formed with epitaxial-growth; a gate electrode arranged on the side wall of the semiconductor layer; a source layer arranged in one side of the gate electrode, the source layer being formed in the semiconductor layer; and a drain layer arranged in other side of the gate electrode, the drain layer being formed in the semiconductor layer.
    Type: Application
    Filed: February 27, 2006
    Publication date: September 7, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20060194383
    Abstract: A semiconductor device includes: a second semiconductor layer formed on a side surface of a first semiconductor by epitaxial growth; a gate electrode disposed on a film formation surface of the second semiconductor layer; a source layer formed on the semiconductor layer and disposed on one side of the gate electrode; and a drain layer formed on the semiconductor layer and disposed on the other side of the gate electrode.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 31, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20060060921
    Abstract: A semiconductor substrate includes a first semiconductor layer that is formed on a semiconductor base substrate, a second semiconductor layer that is formed on the first semiconductor layer and that has an etching selection ratio smaller than that of the first semiconductor layer, a cavity portion that is formed below the second semiconductor layer by removing a portion of the first semiconductor layer, a thermal oxidation film that is formed on the surface of the second semiconductor layer in the cavity portion, and a buried insulating film that is buried in the cavity portion.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 23, 2006
    Inventors: Teruo Takizawa, Kei Kanemoto, Juri Kato, Toshiki Hara
  • Publication number: 20060046393
    Abstract: A semiconductor device includes a gate electrode formed on a semiconductor layer, source and drain layers formed in the semiconductor layer and disposed on both sides of the gate electrode, and a field plate disposed at the back of the semiconductor layer with an insulating layer provided therebetween.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 2, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20060022269
    Abstract: A semiconductor substrate comprising: a semiconductor base; dielectric layers of mutually different film thicknesses formed on the semiconductor base; and semiconductor layers of mutually different film thicknesses formed on the dielectric layers.
    Type: Application
    Filed: July 28, 2005
    Publication date: February 2, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato
  • Publication number: 20050269645
    Abstract: To laminate field effect transistors having different conductivity types, while suppressing deterioration of the crystallinity of semiconductor layers where the field effect transistors are formed. A single crystal semiconductor layer, a dielectric layer and a single crystal semiconductor layer are successively laminated on a dielectric layer, a gate electrode is formed on side walls on both sides of the single crystal semiconductor layers through gate dielectric films and formed on side surfaces on both side of the single crystal semiconductor layers, source/drain layers disposed respectively on both sides of the gate electrode are formed in the single crystal semiconductor layer 13a, and source/drain layers disposed respectively on both sides of the gate electrode are formed in the single crystal semiconductor layer, whereby a P-channel field effect transistor MP1 and an N-channel field effect transistor MN1 are laminated.
    Type: Application
    Filed: May 13, 2005
    Publication date: December 8, 2005
    Applicant: Seiko Epson Corporation
    Inventor: Juri Kato