Patents by Inventor Ju-Seok Lee

Ju-Seok Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120475
    Abstract: The present disclosure relates to a cathode active material for an all-solid-state battery with a controlled particle size and a method for preparing the same. In particular, the cathode active material includes lithium and a transition metal, wherein the cathode active material has a single peak in the range of 1 ?m to 10 ?m as a result of particle size distribution (PSD) analysis.
    Type: Application
    Filed: May 4, 2023
    Publication date: April 11, 2024
    Inventors: Sung Woo NOH, Hong Seok MIN, Sang Heon LEE, Jeong Hyun SEO, Im Sul SEO, Chung Bum LIM, Ju Yeong SEONG, Je Sik PARK
  • Patent number: 11919999
    Abstract: Provided are a method for preparing a polyetherketoneketone and a polyetherketoneketone prepared thereby, wherein, at the time of a polymerization reaction, nitrogen gas is blown into a liquid reaction medium while stirring, thereby quickly removing hydrochloric acid, which is a by-product generated during the reaction, and preventing aggregation of resin particles, thus suppressing the generation of scales.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: March 5, 2024
    Assignee: HANWHA CHEMICAL CORPORATION
    Inventors: Kwang Seok Jeong, Min Sung Kim, Jae Heon Kim, Ju Young Park, Cho Hee Ahn, Byeong Hyeon Lee, Sang Hyun Cho
  • Patent number: 10304541
    Abstract: A memory device includes a memory cell array including a first switch cell, a second switch cell, and a plurality of memory cells disposed between the first the second switch cells and connected to a plurality of word lines, and a control circuit configured to perform a program operation by providing a program voltage to a first word line among the plurality of word lines, a switch voltage to a second word line among the plurality of word lines, and a pass voltage to remaining word lines among the plurality of word lines, wherein the control circuit is configured to turn off the first switch cell and the second switch cell in a first section of the program operation, and configured to turn on the first switch cell and increase the switch voltage in a second section of the program operation later than the first section.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Gyung Hwang, Byoung Taek Kim, Yong Seok Kim, Ju Seok Lee
  • Publication number: 20180374540
    Abstract: A memory device includes a memory cell array including a first switch cell, a second switch cell, and a plurality of memory cells disposed between the first the second switch cells and connected to a plurality of word lines, and a control circuit configured to perform a program operation by providing a program voltage to a first word line among the plurality of word lines, a switch voltage to a second word line among the plurality of word lines, and a pass voltage to remaining word lines among the plurality of word lines, wherein the control circuit is configured to turn off the first switch cell and the second switch cell in a first section of the program operation, and configured to turn on the first switch cell and increase the switch voltage in a second section of the program operation later than the first section.
    Type: Application
    Filed: January 26, 2018
    Publication date: December 27, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Gyung HWANG, Byoung Taek KIM, Yong Seok KIM, Ju Seok LEE
  • Patent number: 10008272
    Abstract: A nonvolatile memory system includes a nonvolatile memory device and a memory controller that controls the nonvolatile memory device. The nonvolatile memory device includes multiple memory blocks. Each of the memory blocks includes memory cells. Each of the memory cells has any one of an erase state and one of multiple different program states. An operation method of the nonvolatile memory system includes receiving a physical erase command from an external device. The operation method also includes performing a fast erase operation, responsive to the received physical erase command, with respect to at least one memory block so that first memory cells of the at least one memory block have a fast erase state different from the erase state.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: June 26, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Woong Kang, Donghun Kwak, Daeseok Byeon, Ju Seok Lee
  • Patent number: 9881696
    Abstract: An operating method of a storage device includes simultaneously buffering first data in a first nonvolatile memory device and a second nonvolatile memory device, simultaneously buffering second data in the second nonvolatile memory device and a third nonvolatile memory device, performing a parity operation on the first data and the second data in the second nonvolatile memory device to generate a parity, and programming the first data, the second data, and the parity into the first nonvolatile memory device, the third nonvolatile memory device, and the second nonvolatile memory device, respectively.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: January 30, 2018
    Assignee: SAMSUNG ELECTRONICS, CO., LTD.
    Inventor: Ju Seok Lee
  • Publication number: 20180005700
    Abstract: A nonvolatile memory system includes a nonvolatile memory device and a memory controller that controls the nonvolatile memory device. The nonvolatile memory device includes multiple memory blocks. Each of the memory blocks includes memory cells. Each of the memory cells has any one of an erase state and one of multiple different program states. An operation method of the nonvolatile memory system includes receiving a physical erase command from an external device. The operation method also includes performing a fast erase operation, responsive to the received physical erase command, with respect to at least one memory block so that first memory cells of the at least one memory block have a fast erase state different from the erase state.
    Type: Application
    Filed: May 5, 2017
    Publication date: January 4, 2018
    Inventors: HEE-WOONG KANG, DONGHUN KWAK, DAESEOK BYEON, JU SEOK LEE
  • Patent number: 9761321
    Abstract: An operating method is provided which includes receiving a read command and a read address, performing a read operation about memory cells selected according to the read address, and performing a reliability verification read operation about unselected memory cells adjacent to the selected memory cells. A number of memory cells each corresponding to at least one state of an erase state and program states of the unselected memory cells is counted as a count value based on the result of the reliability verification read operation. Data read through the read operation is output to an external device and data read through the reliability verification read operation is not output to the external device.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: September 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju Seok Lee
  • Patent number: 9576672
    Abstract: A nonvolatile memory device comprises a cell array connected to a plurality of bit lines in an all bit line structure, a page buffer circuit connected to the plurality of bit lines, and control logic configured to control the page buffer circuit. The control logic controls the page buffer circuit to sense memory cells corresponding to both even-numbered and odd-numbered columns of a selected page in a first read mode and to sense memory cells corresponding to one of the even-numbered and odd-numbered columns of the selected page in a second read mode. A sensing operation is performed at least twice in the first read mode and once in the second read mode.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: February 21, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaeyong Jeong, Ju Seok Lee
  • Patent number: 9553624
    Abstract: Disclosed are a card socket device and an electronic apparatus including the same. The card socket device includes a seat portion configured to receive an attachable card; and one or more connection terminal portions formed in the seat portion and configured to form an electrical connection with one or more connection pads formed in a bottom surface of the attachable card, wherein the seat portion is configured such that a space accommodating the attachable card is upwardly opened.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: January 24, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-bum Lee, Ki-sun Kim, Jong-rak Sohn, Seok-chan Lee, Dong-min Kim, Ju-seok Lee
  • Publication number: 20160351271
    Abstract: An operating method is provided which includes receiving a read command and a read address, performing a read operation about memory cells selected according to the read address, and performing a reliability verification read operation about unselected memory cells adjacent to the selected memory cells. A number of memory cells each corresponding to at least one state of an erase state and program states of the unselected memory cells is counted as a count value based on the result of the reliability verification read operation. Data read through the read operation is output to an external device and data read through the reliability verification read operation is not output to the external device.
    Type: Application
    Filed: August 11, 2016
    Publication date: December 1, 2016
    Inventor: JU SEOK LEE
  • Patent number: 9502128
    Abstract: A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: November 22, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju Seok Lee
  • Patent number: 9431122
    Abstract: An operating method is provided which includes receiving a read command and a read address, performing a read operation about memory cells selected according to the read address, and performing a reliability verification read operation about unselected memory cells adjacent to the selected memory cells. A number of memory cells each corresponding to at least one state of an erase state and program states of the unselected memory cells is counted as a count value based on the result of the reliability verification read operation. Data read through the read operation is output to an external device and data read through the reliability verification read operation is not output to the external device.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: August 30, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju Seok Lee
  • Publication number: 20160247577
    Abstract: A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.
    Type: Application
    Filed: May 2, 2016
    Publication date: August 25, 2016
    Inventor: JU SEOK LEE
  • Patent number: 9361997
    Abstract: A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: June 7, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju Seok Lee
  • Publication number: 20160124809
    Abstract: An operating method of a storage device includes simultaneously buffering first data in a first nonvolatile memory device and a second nonvolatile memory device, simultaneously buffering second data in the second nonvolatile memory device and a third nonvolatile memory device, performing a parity operation on the first data and the second data in the second nonvolatile memory device to generate a parity, and programming the first data, the second data, and the parity into the first nonvolatile memory device, the third nonvolatile memory device, and the second nonvolatile memory device, respectively.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 5, 2016
    Inventor: Ju Seok LEE
  • Publication number: 20160093394
    Abstract: An operating method is provided which includes receiving a read command and a read address, performing a read operation about memory cells selected according to the read address, and performing a reliability verification read operation about unselected memory cells adjacent to the selected memory cells. A number of memory cells each corresponding to at least one state of an erase state and program states of the unselected memory cells is counted as a count value based on the result of the reliability verification read operation. Data read through the read operation is output to an external device and data read through the reliability verification read operation is not output to the external device.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 31, 2016
    Inventor: JU SEOK LEE
  • Publication number: 20160055917
    Abstract: A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.
    Type: Application
    Filed: May 22, 2015
    Publication date: February 25, 2016
    Inventor: JU SEOK LEE
  • Patent number: D912900
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: March 9, 2021
    Inventors: Benjamin S. Avery, Anton Fahlgren, Ju Seok Lee, Fred Simon
  • Patent number: D958457
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: July 19, 2022
    Inventors: Benjamin S Avery, Anton Fahlgren, Ju Seok Lee, Fred Simon