Abstract: A semiconductor device includes a semiconductor substrate, a photon avalanche detector in the semiconductor substrate. The photon avalanche detector includes an anode of a first conductivity type and a cathode of a second conductivity type. A guard ring is in the semiconductor substrate and at least partially surrounds the photon avalanche detector. A passivation layer of the first conductivity type is in contact with the guard ring to reduce an electric field at an edge of the photon avalanche detector.

Abstract: A merchandise display hook has a time delay mechanism for increasing the amount of time required to dispense items of merchandise from a display arm, while permitting bulk loading of the items of merchandise onto the display arm. The time delay mechanism includes a housing, a helix extending from the housing in a rearward direction, and a rotatable handle extending from the housing in a forward direction. Rotation of the handle causes the helix to rotate about the display arm to thereby dispense the items of merchandise from the display arm in the forward direction. The time delay mechanism further includes a lock mechanism having a secured position for attaching the time delay mechanism to the display arm and an unsecured position for allowing the time delay mechanism to be detached from the display arm to permit bulk loading.

Abstract: A locking device for a merchandise display hook has an upper rod disposed along a longitudinal axis and a lower rod disposed generally parallel to the longitudinal axis and the upper rod. The locking device includes a housing having a vertical slot adapted to receive the upper rod and the lower rod of the display hook. A bayonet is movable between a locked position in which a portion of the bayonet extends into the slot and restricts movement of at least one of the upper rod and the lower rod within the slot, and an unlocked position in which the bayonet does not extend into the slot and thereby permits movement of the upper rod and the lower rod within the slot. An elongate nose depending outwardly from the housing defines a channel that intersects the slot of the housing and receives the upper rod of the display hook with the upper rod and the lower rod disposed within the slot.

Abstract: A semiconductor device includes a semiconductor substrate, a photon avalanche detector in the semiconductor substrate. The photon avalanche detector includes an anode of a first conductivity type and a cathode of a second conductivity type. A guard ring is in the semiconductor substrate and at least partially surrounds the photon avalanche detector. A passivation layer of the first conductivity type is in contact with the guard ring to reduce an electric field at an edge of the photon avalanche detector.

Abstract: An image sensor power distribution arrangement includes a sensing portion having a first contact at a first edge thereof and a second contact at a second edge thereof, and a control portion. A first power supply supplies power to the sensing portion via the first contact. A second power supply supplies power to the sensing portion via the second contact, and to the control portion.

Abstract: A CMOS single photon avalanche diode (SPAD) design uses conventional, or at least known, CMOS processes to produce a device having a breakdown region in which the main p-n junction is formed of a deep n-well layer, and optionally on the other side, a p-add layer. The SPAD may also have a guard ring region which comprises the p-epi layer without any implant. The SPAD may have curved or circular perimeters. A CMOS chip comprises SPADs as described and other NMOS devices all sharing the same deep n-well.

Abstract: An optical device cooling apparatus includes an image sensor array and a MEMS fan. The MEMS fan is formed integrally with the image sensor array, and cools the image sensor array.

Abstract: An image sensor power distribution arrangement includes a sensing portion having a first contact at a first edge thereof and a second contact at a second edge thereof, and a control portion. A first power supply supplies power to the sensing portion via the first contact. A second power supply supplies power to the sensing portion via the second contact, and to the control portion.

Abstract: An image sensor may have a power supply voltage regulator controlled by a feedback loop. The feedback signal may be derived by applying the supply voltage at a point distant from the voltage regulator to an analog-to-digital converter (ADC) which may be a spare channel of an ADC provided for the output of the pixel array. The digital feedback loop may be controlled via a chip I2C bus.

Abstract: An image sensor IC may have a non-volatile memory for several functions. The functions may include storing control parameters for a camera autofocus module, part tracking data, and data for defect correction or color science. The non-volatile memory can in particular be an antifuse non-volatile memory, which may not need special light shielding.

Abstract: An image sensor may include a shared memory resources which can be selectively used by a digital filter for image scaling or by a defect correction circuit.

Abstract: In a solid state image sensor having a pixel array, a first frame is imaged using varying exposure times in a series of zones. The exposure time for a subsequent frame is selected from the results of the first frame, The exposure times are controlled in a rolling blade manner by controlling the number of lines between reset and readout. The sensor is particularly suited to use in bar code readers.