Patents by Inventor Ju Young Yun

Ju Young Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8265720
    Abstract: Disclosed herein is a hinge device for a cellular phone, which has no device housing and thus, can achieve a greater slimness of the cellular phone and reduce the generation of a noise during a sliding operation of a slide body included in the cellular phone. The hinge device includes a first push rod connected to a main body of the cellular phone and having a pin and a pin hole, and a second push rod connected to a slide body of the cellular phone and having a pin and a pin hole. The pin of the first push rod is penetrated through the pin hole of the second push rod, and the pin of the second push rod is penetrated through the pin hole of the first push rod. A spring is provided around each pin.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: September 11, 2012
    Assignee: Diabell Co., Ltd.
    Inventors: Sung-Sang Ahn, Ju-Young Yun
  • Publication number: 20110231251
    Abstract: Provided are a digital broadcast network system for providing a widget service and an operating method thereof The digital broadcast network system includes a communication network, a broadcast terminal, and a broadcasting station system. The broadcasting station system provides widget advertisement contents, received from a widget content provider, to the broadcast terminal. The broadcast terminal outputs the received widget advertisement contents to a display unit in response to a widget display control signal, and transmits product purchase information to the broadcasting station system when receiving a purchase request signal for products included in the widget advertisement contents.
    Type: Application
    Filed: May 13, 2010
    Publication date: September 22, 2011
    Inventors: Ho Yeon Jang, Ju Young Yun
  • Patent number: 7830505
    Abstract: The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: November 9, 2010
    Assignee: Korea Research Institute of Standards and Science
    Inventors: Sang Woo Kang, Ju Young Yun, Dae Jin Seong, Yong Hyeon Shin
  • Publication number: 20100154168
    Abstract: Disclosed herein is a hinge device for a cellular phone, which has no device housing and thus, can achieve a greater slimness of the cellular phone and reduce the generation of a noise during a sliding operation of a slide body included in the cellular phone. The hinge device includes a first push rod connected to a main body of the cellular phone and having a pin and a pin hole, and a second push rod connected to a slide body of the cellular phone and having a pin and a pin hole. The pin of the first push rod is penetrated through the pin hole of the second push rod, and the pin of the second push rod is penetrated through the pin hole of the first push rod. A spring is provided around each pin.
    Type: Application
    Filed: May 23, 2007
    Publication date: June 24, 2010
    Applicant: DIABELL CO., LTD.
    Inventors: Sung-Sang Ahn, Ju-Young Yun
  • Publication number: 20090064756
    Abstract: The present invention provides a vacuum gauge calibration apparatus capable of calibrating and testing a vacuum gauge without displacement or separation of the vacuum gauge, the vacuum gauge being attached to a vacuum device under operation together with developing a movable vacuum gauge calibration device, and an operating method thereof.
    Type: Application
    Filed: November 9, 2007
    Publication date: March 12, 2009
    Applicant: Korea Research Institute of Standards and Science
    Inventors: Seung Soo Hong, Jin Tae Kim, Ju Young Yun
  • Publication number: 20090046285
    Abstract: The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 19, 2009
    Inventors: Sang Woo Kang, Ju Young Yun, Dae Jin Seong, Yong Hyeon Shin
  • Patent number: 7384866
    Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: June 10, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-young Yun, Gil-heyun Choi, Byung-hee Kim, Jong-myeong Lee, Seung-gil Yang, Jung-hun Seo
  • Publication number: 20080000585
    Abstract: The present invention relates to an apparatus and method for monitoring an electron density and electron temperature of a plasma.
    Type: Application
    Filed: August 24, 2006
    Publication date: January 3, 2008
    Applicant: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCE
    Inventors: Jung Hyung Kim, Ju Young Yun, Dae Jin Seong
  • Patent number: 7211769
    Abstract: A heating chamber which can be used during a reflow process to form a metal wiring having a multi-layered writing structure and a method of heating a wafer using the same, are provided. The heating chamber is movable upward and downward between the upper process position and the lower loading position, and includes a pedestal having a supporting surface for supporting a wafer, a cover installed above the pedestal to form a processing area together with the supporting surface when the pedestal is placed in its raised process position and a heating unit for heating the waver. In the method of heating the wafer, the temperature in the processing area is maintained suitable for heating the wafer before the wafer is loaded onto the supporting surface, the wafer is loaded onto the supporting surface and the loaded wafer is heating in the processing area.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: May 1, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Hee Kim, Jong-Myeong Lee, Myoung-Bum Lee, Ju-Young Yun, Gil-Heyun Choi
  • Patent number: 6955983
    Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: October 18, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-young Yun, Gil-heyun Choi, Byung-hee Kim, Jong-myeong Lee, Seung-gil Yang, Jung-hun Seo
  • Patent number: 6951814
    Abstract: Methods of forming a metal wiring layer on an integrated circuit include forming an insulating pattern including a recess region on an integrated circuit substrate. A metal layer is formed in the recess region and on a top surface of the insulting pattern. The metal layer is removed from the top surface of the insulating pattern adjacent the recess region and from an upper portion of the recess region. An aluminum film is formed on the metal layer at a process temperature less than a reflow temperature of the metal layer to substantially fill the upper portion of the recess region after removing the metal layer. A metal film is formed on the aluminum film at a process temperature less than the reflow temperature of the etched metal layer.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: October 4, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-hee Kim, Gil-heyun Choi, Ju-young Yun, Jung-hun Seo
  • Publication number: 20050179141
    Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.
    Type: Application
    Filed: March 31, 2005
    Publication date: August 18, 2005
    Inventors: Ju-young Yun, Gil-heyun Choi, Byung-hee Kim, Jong-myeong Lee, Seung-gil Yang, Jung-hun Seo
  • Patent number: 6849555
    Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: February 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-myeong Lee, Byung-hee Kim, Myoung bum Lee, Ju-young Yun, Gil-heyun Choi
  • Publication number: 20040096571
    Abstract: Methods of forming a metal wiring layer on an integrated circuit include forming an insulating pattern including a recess region on an integrated circuit substrate. A metal layer is formed in the recess region and on a top surface of the insulting pattern. The metal layer is removed from the top surface of the insulating pattern adjacent the recess region and from an upper portion of the recess region. An aluminum film is formed on the metal layer at a process temperature less than a reflow temperature of the metal layer to substantially fill the upper portion of the recess region after removing the metal layer. A metal film is formed on the aluminum film at a process temperature less than the reflow temperature of the etched metal layer.
    Type: Application
    Filed: August 27, 2003
    Publication date: May 20, 2004
    Inventors: Byung-Hee Kim, Gil-Heyun Choi, Ju-Young Yun, Jung-Hun Seo
  • Publication number: 20040082167
    Abstract: A recess is formed in a microelectronic substrate, and then a metal-containing layer is formed that conforms to an inner surface of the recess and to a surface of the substrate adjacent the recess. A carbon concentration in a portion of the metal-containing layer on the surface of the substrate adjacent the recess is decreased in comparison to a portion of the metal-containing layer within the recess, e.g., using a plasma treatment that has a greater effect on the surface outside of the recess. Aluminum is then deposited on the metal-containing layer to form an aluminum layer that conforms to the inner surface of the recess and to the surface of the substrate adjacent the recess. Preferably, the carbon concentration in the portion of the metal-containing layer within the recess is sufficiently great to cause aluminum to deposited at a greater rate on the portion of the metal-containing layer within the recess.
    Type: Application
    Filed: July 16, 2003
    Publication date: April 29, 2004
    Inventors: Jung-Hun Seo, Gil-Heyun Choi, Ju-Young Yun, Byung-Hee Kim, Seung-Gil Yang
  • Publication number: 20030222346
    Abstract: A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the dielectric layer pattern outside the hole. At least some of the barrier metal layer is oxidized. An anti-nucleation layer is selectively formed on the oxidized barrier metal layer outside the hole that exposes the oxidized barrier metal layer in the hole. A metal layer then is selectively formed on the exposed oxidized barrier layer in the hole.
    Type: Application
    Filed: February 24, 2003
    Publication date: December 4, 2003
    Inventors: Ju-Young Yun, Gil-Heyun Choi, Byung-Hee Kim, Jong-Myeong Lee, Seung-Gil Yang, Jung-Hun Seo
  • Publication number: 20030207522
    Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.
    Type: Application
    Filed: June 2, 2003
    Publication date: November 6, 2003
    Inventors: Jong-Myeong Lee, Byung-Hee Kim, Myoung Bum Lee, Ju-Young Yun, Gil-Heyun Choi
  • Patent number: 6586340
    Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: July 1, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-myeong Lee, Byung-hee Kim, Myoung bum Lee, Ju-young Yun, Gil-heyun Choi
  • Publication number: 20030000936
    Abstract: A heating chamber which can be used during a reflow process to form a metal wiring having a multi-layered writing structure and a method of heating a wafer using the same, are provided. The heating chamber is movable upward and downward between the upper process position and the lower loading position, and includes a pedestal having a supporting surface for supporting a wafer, a cover installed above the pedestal to form a processing area together with the supporting surface when the pedestal is placed in its raised process position and a heating unit for heating the waver. In the method of heating the wafer, the temperature in the processing area is maintained suitable for heating the wafer before the wafer is loaded onto the supporting surface, the wafer is loaded onto the supporting surface and the loaded wafer is heating in the processing area.
    Type: Application
    Filed: April 1, 2002
    Publication date: January 2, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byung-Hee Kim, Jong-Myeong Lee, Myoung-Bum Lee, Ju-Young Yun, Gil-Heyun Choi
  • Publication number: 20020132487
    Abstract: An integrated in situ cluster type wafer processing apparatus which can be used for forming metal wiring layers having a multi-layered structure and a wafer processing method using the same are provided. The wafer processing apparatus includes a transfer chamber which can be exhausted and has a plurality of gate valves, a plurality of vacuum processing chambers each of which can be connected to the transfer chamber via one of the gate valves, and a load lock chamber which can be exhausted and is connectable to a first gas feed line for feeding an oxygen-based gas into the load lock chamber. In a wafer processing method, a predetermined layer is formed on a wafer in one of the vacuum processing chambers. The predetermined layer on the wafer is oxidized in the load lock chamber or an oxygen atmosphere chamber.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 19, 2002
    Inventors: Jong-Myeong Lee, Byung-Hee Kim, Myoung Bum Lee, Ju-Young Yun, Gil-Heyun Choi