Abstract: An access control system is provided to prevent the surreptitious granting of access to privacy related functionality on an electronic device. Software-based events to grant access to device functionality can be validated by confirming that the software event corresponds with a hardware input event. This validation prevents the spoofing of a user interface input that may be used to fraudulently grant access to specific functionality.

Abstract: Implementations described herein relate to dynamic and predictive updating of a payment attribute of a payment instrument. In some implementations, the method includes receiving, at a computing device, route data for a plurality of trips, receiving, at the computing device, first trip data for the first trip from the user device, wherein the first trip data includes at least location data of the user device, calculating, based on the received first trip data, a fuel likelihood score for the first trip, comparing the fuel likelihood score to a first threshold, based on a determination that the fuel likelihood score meets the first threshold: transmitting, to a computer associated with a payment network, a message to update one or more payment attributes stored at the payment network and associated with the first payment instrument, and displaying an indication that the first payment instrument is approved for the fuel transaction.

Abstract: An agricultural modeling system may include a mobile ranging platform configured to generate 3D point cloud data of an agricultural geographic area, client devices, a geospatial database configured to store a data layer for the agricultural geographic area, and a server computing resource in communication with the mobile ranging platform, the client devices, and the geospatial database. The server computing resource may be configured to geographically reference the data layer fused with the 3D point cloud data of the agricultural geographic area, and generate a multi-layered data model for the geographically referenced data layer fused with the 3D point cloud data of the agricultural geographic area. A client device may be configured to selectively render the multi-layered data model.

Abstract: An integrated circuit includes an upper semiconductor body extending in a first direction from an upper source region to an upper drain region, and a lower semiconductor body extending in the first direction from a lower source region to a lower drain region. The upper body is spaced vertically from the lower body in a second direction orthogonal to the first direction. A gate spacer structure is adjacent to the upper and lower source regions. In an example, the gate spacer structure includes (i) a first section having a first dimension in the first direction, and (ii) a second section having a second dimension in the first direction. In an example, the first dimension is different from the second dimension by at least 1 nm. In some cases, an intermediate portion of the gate spacer structure extends laterally within a given gate structure, or between upper and lower gate structures.

Abstract: Techniques are provided herein to form non-planar semiconductor devices in a stacked transistor configuration adjacent to stressor materials. In one example, an n-channel device and a p-channel device may both be gate-all-around transistors each having any number of nanoribbons extending in the same direction, where the n-channel device is located vertically above the p-channel device (or vice versa). Source or drain regions are adjacent to both ends of the n-channel device and both ends of the p-channel device. On the opposite side of the stacked source or drain regions (e.g., opposite from the nanoribbons), stressor materials may be used to fill the gate trench in place of additional semiconductor devices. The stressor materials may include, for instance, a compressive stressor material adjacent to the p-channel device and/or a tensile stressor material adjacent to the n-channel device. The stressor material(s) may form or otherwise be part of a diffusion cut structure.

Abstract: An integrated circuit structure includes a device layer including an upper device above a lower device. The upper device includes an upper source or drain region, and an upper source or drain contact coupled to the upper source or drain region. The lower device includes a lower source or drain region. A first conductive feature is below the device layer, where the first conductive feature is coupled to the lower source or drain region. A second conductive feature vertically extends through the device layer. In an example, the second conductive feature is to couple (i) the first conductive feature below the device layer and (ii) an interconnect structure above the device layer. Thus, the first and second conductive features facilitate a connection between the interconnect structure on the frontside of the integrated circuit and the lower source or drain region towards the backside of the integrated circuit.

Abstract: An integrated circuit structure includes a device including a source region, a drain region, a body laterally between the source and drain regions, and a source contact coupled to the source region. In an example, the source region includes a first region, and a second region compositionally different from and above the first region. The source contact extends through the second region and extends within the first region. In an example where the device is a p-channel metal-oxide-semiconductor (PMOS) device, a concentration of germanium within the second region is different (e.g., higher) than a concentration of germanium within the first region. In another example where the device is a n-channel metal-oxide-semiconductor (NMOS) device, a doping concentration level of a dopant (e.g., an n-type dopant) within the second region is different (e.g., higher) from a doping concentration level of the dopant within the first region.

Abstract: An integrated circuit structure includes a second device stacked vertically above a first device. The first device includes (i) a first source or drain region, (ii) a first source or drain contact coupled to the first source or drain region, and (iii) a first layer comprising a first metal and first one or more semiconductor materials between at least a section of the first source or drain region and the first source or drain contact. The second device includes (i) a second source or drain region, (ii) a second source or drain contact coupled to the second source or drain region, and (iii) a second layer comprising a second metal and second one or more semiconductor materials between at least a section of the second source or drain region and the second source or drain contact. In an example, the first metal and the second metal are different.

Abstract: A semiconductor structure includes a second device stacked over a first device. In an example, the first device includes (i) a first source region, (ii) a first drain region, (iii) a body including a semiconductor material extending laterally from the first source region to the first drain region, and (iv) a first gate structure at least in part wrapped around the body. The body can be, for instance, a nanoribbon, nanosheet, or nanowire. In an example, the second device comprises (i) a second source region, (ii) a second drain region, and (iii) a second gate structure at least in part laterally between the second source region and the second drain region. In an example, the second device lacks a continuous body extending laterally from the second source region to the second drain region.

Abstract: A semiconductor structure includes an upper device stacked over a lower device. In an example, the upper device includes (i) a first source region, (ii) a first drain region, (iii) a body of semiconductor material extending laterally from the first source region to the first drain region, and (iv) a first gate structure at least in part wrapped around the body. In an example, the lower device includes (i) a second source region, (ii) a second drain region, and (iii) a second gate structure at least in part laterally between the second source region and the second drain region. In an example, the lower device lacks a body of semiconductor material extending laterally from the second source region to the second drain region. In another example, the upper device lacks a body of semiconductor material extending laterally from the first source region to the first drain region.

Abstract: At an electronic device, a user input is detected that corresponds to a respective user interface element in a portion of a user interface that is associated with a first standard gesture recognizer and a first supplemental gesture recognizer. The user input is processed in accordance with the first standard gesture recognizer and the first supplemental gesture recognizer. In accordance with a determination that content associated with the respective user interface element cannot be added to a drag operation, the device fails to recognize the user input using the first supplemental gesture recognizer, and processes the user input using the first standard gesture recognizer. On the other hand, in accordance with a determination that the content associated with the respective user interface element can be added to the drag operation, a gesture is recognized using the first supplemental gesture recognizer and the content is added to the drag operation.

Abstract: A nozzle attachment and method for its use is provided. The nozzle attachment can be affixed to a fluid outlet. The nozzle attachment is constructed and arranged to increase the total output flow, flux, of the fluid outlet by using the high velocity directional fluid flow from the outlet to create a pressure differential between the flow and the surrounding medium, thereby causing fluid particles from the surrounding medium to be drawn into the fluid flow. The nozzle attachment comprises a nozzle attachment fixation element, a funnel element, and a frame connector extending between the nozzle attachment fixation element and the funnel element. The nozzle attachment has many applications and uses.

Abstract: The present invention provides an improved electronic fall monitoring system comprising a device having multiple sensor ports for flexibly monitoring various sensors associated with a single patient without requiring repeated connections and disconnections of sensors. With several sensors simultaneously connected at different locations, a processor can execute to ensure that only one sensor, corresponding to one patient, is monitored at any given time, including by triggering an alarm when a second sensor is triggered while a first sensor is in use. Accordingly, the system can provide a “one step transfer” in which a caregiver may simply press hold once to transfer a patient from one sensed area to another. In addition, the caregiver can simply actuate a single input with only a momentary press to allow suspension of monitoring for a shorter duration (hold) or a longer press to allow suspension of monitoring for a longer duration (extended hold).

Abstract: At a first timestep, one or more first objects can be determined in a first fusion image based on determining one or more first radar clusters in first radar data and determining one or more first two-dimensional bounding boxes in first camera data. First detected objects and first undetected objects can be determined by inputting the first objects and the first radar clusters into a data association algorithm, which determines first probabilities and adds the first radar clusters and the first objects to one or more of first detected objects or first undetected objects by determining a cost function. The first detected objects and the first undetected objects can be input to a first Poisson multi-Bernoulli mixture (PMBM) filter to determine second detected objects, second undetected objects and second probabilities. The second detected objects and the second undetected objects can be reduced based on the second probabilities determined by the first PMBM filter and the second detected objects can be output.

Abstract: An electronic device, while displaying a user interface of an application, detects a user input on a portion of the user interface associated with a plurality of gesture recognizers. A first set of standard gesture recognizers are associated with the portion of the user interface by the application; a second set of supplemental gesture recognizers are associated with the portion of the user interface by a system process; and a first failure requirement determines which gesture recognizers must fail before other gesture recognizers can recognize a user input. In one example, the first failure requirement is that a particular standard gesture recognizer (e.g., an intensity-based gesture recognizer) must fail before a particular supplemental gesture recognizer (e.g., a drag start gesture recognizer) can recognize a user input.

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate and an adjacent second gate above the quantum well stack; and a gate wall between the first gate and the second gate, wherein the gate wall includes a spacer and a capping material, the spacer has a top and a bottom, the bottom of the spacer is between the top of the spacer and the quantum well stack, and the capping material is proximate to the top of the spacer.

Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer, wherein the quantum well layer includes an isotopically purified material; a gate dielectric above the quantum well stack; and a gate metal above the gate dielectric, wherein the gate dielectric is between the quantum well layer and the gate metal.

Abstract: Disclosed herein are quantum dot devices with multiple layers of gate metal, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; an insulating material above the quantum well stack, wherein the insulating material includes a trench; and a gate on the insulating material and extending into the trench, wherein the gate includes a first gate metal in the trench and a second gate metal above the first gate metal.

Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.