Abstract: An apparatus for providing over current protection for a digital pulse width modulator is disclosed. The apparatus includes first logic circuitry for generating a primary interrupt indicating that a detected output current is greater than a threshold current. Second logic circuitry generates a secondary input responsive to the occurrence to the primary interrupt for a predetermined number of times.

Abstract: A system for controlling a switching power converter and includes a digital controller that receives an analog signal representing the output DC voltage of the power converter for comparison to a desired output voltage level and generates switching control signals to control the operation of the power supply to regulate the output DC voltage to said desired output voltage level. At least two of the switching control signals having a dead time between a first edge of a first control signal and a second edge of a second control signal. The dead time is programmable such that the second edge of the second control signal may occur at a selected point in time either before or after the first edge of the first control signal.

Abstract: An apparatus for providing over current protection for a digital pulse width modulator is disclosed. The apparatus includes first logic circuitry for generating a primary interrupt indicating that a detected output current is greater than a threshold current. Second logic circuitry blanks out current spikes in the output current occurring on a leading pulse edge of at least one of a plurality of outputs of the digital pulse-width modulator.

Abstract: A method for providing wireless communication between a mobile station and a network station using a context for message compression is provided. Profile-specific information is stored persistently in a profile-specific dictionary. Communication is then provided between the mobile station and the network station using the profile-specific dictionary for message compression.

Abstract: Open loop common mode driver for switched capacitor input to SAR. A method for controlling the operation of a SAR conversion cycle. The method includes the steps of first initiating the SAR conversion cycle by connecting one side of a plurality of capacitors in a capacitor array to a first capacitor reference voltage and the other side of the plurality of capacitors to the input of a comparator. This is followed by the step of sequentially switching in a plurality of compare cycles the one side of a select one or ones of the capacitors to a second capacitor reference voltage to change the voltage on the input of the comparator. Then, a compare operation is initiated after initiation of each compare cycle to compare the value on the input of the comparator with a compare reference voltage after a predetermined settling time has elapsed from the beginning of the initiation of each compare cycle.

Abstract: A timing source for a pulse generator is disclosed, which timing source includes an input for receiving a reference clock output at a reference operating frequency. An edge generator is provided for generating a plurality of clock edges from an edge of the reference clock during one period thereof, with the spacing of the plurality of clock edges being a multiple of a predetermined divisor. As such, the resolution of such spacing emulates a higher clock frequency than the reference operating frequency. A selector then selects one of the plurality of clock edges from a reference one thereof to define the width of a pulse.

Abstract: A portable self contained parameter sensing unit for sensing environmental parameters and communicating such to a user. The unit includes a housing having a transducer for conveying information to the user and an integrated circuit. The integrated circuit includes an integrated environmental sensor for sensing current predetermined environmental parameters in the analog domain. It also includes a data converter for converting the sensed current predetermined environmental parameters in the analog domain to the digital domain as digital sensed environmental parameters. An integrated memory is provided for storing information in the digital domain with an integrated processing unit for processing the sensed current predetermined environmental parameters in the digital domain in accordance with translation parameters stored in the integrated memory for conversion such that the digital value of the sensed environmental parameters are translated into a translated value that can be provided to a user.

Abstract: Method and apparatus for subclocking a SAR analog-to-digital converter. A method is disclosed for clocking the operation of a SAR analog-to-digital converter (ADC). A low frequency clock and a high frequency clock are provided. An analog input voltage is then tracked during a tracking phase to sample the value thereof. A conversion cycle referenced to an edge of the low frequency clock is then initiated. The sampled data is then converted in a conversion operation during a data conversion cycle, which conversion operation requires a plurality of conversion clock cycles. The timing of at least a portion of the conversion operation is controlled during the data conversion cycle utilizing the high frequency clock as the conversion clock.

Abstract: Mixed signal processor with noise management. A method for noise management in a mixed signal processor integrated circuit having a digital processing section and an analog section The digital processing section is clocked at a first clock rate to process digital data. When a conversion operation is to be carried out by the analog section, the clocking of the digital processing section is inhibited during at least a portion of the data conversion operation by the analog section to prevent noise from clock transitions in the digital processing section from being injected into the analog section during the at least a portion of th data conversion operation.

Abstract: Gain control for delta sigma analog-to-digital converter. A method is disclosed for driving the input of an integrator in a delta-sigma converter having an amplifier with a non-inverting input, an output and a positive input connected to a reference voltage and an integration capacitor connected between the non-inverting input and the output. An input voltage is sampled at a first rate onto an input sampling capacitor and then charge is dumped from the input sampling capacitor to the non-inverting input of the amplifier at a second time and at the first rate. A reference voltage is sampled onto a feedback sampling capacitor at substantially the first rate, and charge stored on the feedback sampling capacitor is dumped to the non-inverting input of the amplifier at a second rate different than the first rate.

Abstract: A CAN microcontroller that supports a plurality of message objects, including a processor core that runs CAN applications, and a CAN/CAL module that processes incoming messages, and a data memory. The data memory includes a first memory segment that provides a plurality of message buffers associated with respective ones of the message objects, and a second memory segment that provides a plurality of memory-mapped registers for each of the message objects. The memory-mapped registers for each message object contain respective command/control fields for configuration and setup of that message object.

Abstract: A CAN microcontroller that supports a plurality of message objects, including a processor core that runs CAN applications, and a CAN/CAL module that processes incoming messages, and a data memory. The data memory includes a first memory segment that provides a plurality of message buffers associated with respective ones of the message objects, and a second memory segment that provides a plurality of memory-mapped registers for each of the message objects. The memory-mapped registers for each message object contain respective command/control fields for configuration and setup of that message object.

Abstract: A system and method for monitoring a garage door position from a remote location. A local sensor detects the position of a garage door and provides this information to a local transmitter. The transmitter is capable of generating a signal indicating the garage door position, where the signal can be detected by a remote receiver. In one embodiment, infrared sensors are used to detect the garage door position, while in another embodiment trigger switches detect the direction in which the garage door is moving.

Abstract: A system and method for monitoring a garage door position from a remote location. A local sensor detects the position of a garage door and provides this information to a local transmitter. The transmitter is capable of generating a signal indicating the garage door position, where the signal can be detected by a remote receiver. In one embodiment, infrared sensors are used to detect the garage door position, while in another embodiment trigger switches detect the direction in which the garage door is moving.

Abstract: A system and method for monitoring a garage door position from a remote location. A local sensor detects the position of a garage door and provides this information to a local transmitter. The transmitter is capable of generating a signal indicating the garage door position, where the signal can be detected by a remote receiver. In one embodiment, infrared sensors are used to detect the garage door position, while in another embodiment trigger switches detect the direction in which the garage door is moving.

Abstract: A high pass filter is provided utilizing a digital filter with coefficients that can be switched to provide for two responses, a fast response and a slow response. A first response is provided by an accumulator block (38) disposed between the output and a summing junction (30) on the input of the digital filter. A multiplexer (40) selects between this accumulator block (38) and a slow response accumulator block (42). The switching is effected with a zero crossing detect circuit (26). When the first and faster response brings the DC level down to a value that is close to zero, the second and slower response is selected to basically lock it to zero.