Abstract: A method and apparatus are provided for operating a wall switch module using leakage current. In one embodiment, the wall switch module may be operable using leakage current. The wall switch control module may be provided to include a microcontroller, wireless receiver and triac. The wall switch control module may be configured to control power applied to a load. In another embodiment, one or more signals received by the wireless receiver may be useable to control power applied to a load coupled to the wall switch control module. According to another embodiment, the wall switch control module may be useable for home automated systems.

Abstract: The present invention relates to methods of making articles, and systems for providing wool article have self-cleaning properties. The self-cleaning properties are brought about coating the wool articles with a photocatalyst formulation. The formulation contains titanium compounds, stabilizers, catalysts, and water.

Abstract: An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A plurality of comparators perform compare operations within the integrated circuit package. At least one control register is associated with each of the plurality of comparators. The plurality of comparators are programmable to operate in a plurality of operating modes responsive to control bits established in the at least one control register by the processing core.

Abstract: A reconfigurable processor includes a processor core for operating on a set of instructions to carry out predefined processes and includes a plurality of input/output pins in addition to a plurality of functional input/output blocks. These functional blocks allow the processing core to interface with the plurality of input/output pins, each of the functional input/output blocks having an associated and predetermined functionality. This functionality comprises the output as a function of the input, the function defined by the functionality. Each of the functional input/output blocks has a requirement for a defined number of the plurality of input/output pins wherein the total of the defined number for all of the plurality of functional input/output blocks exceeds the number of the plurality of input/output pins and wherein the processor core is interfaced with one of the input or output of each of the functional blocks.

Abstract: An integrated circuit package includes a processing core for operating on a set of instructions to carry out predefined processes. A flash memory stores instructions within the integrated circuit package. A plurality of registers stores data and the program instructions during execution of the program instructions. A JTAG interface provides an interface with the integrated circuit package and enables interactions with the processing core and the plurality of registers. Emulation logic enables manipulating and monitoring program flow through the JTAG interface during execution of the program instructions.

Abstract: In accordance with one embodiment of the present invention, there is provided a technique for dynamically pipelined data migration. According to one aspect, it is determined that a source schema-conformant source data set is to be converted to a target schema-conformant target data set. A plurality of conversion mechanisms, which can be invoked in succession to convert the source data set into the target data set, is automatically determined. The plurality of conversion mechanisms comprises (a) an initial set of one or more conversion mechanisms that can be invoked in succession to convert the source data set to a final intermediate data set, and (b) a final conversion mechanism that converts the final intermediate data set to the target data set. Each conversion mechanism in the plurality of conversion mechanisms is successively invoked, in order, to convert the set of source data set to the target data set.

Abstract: In accordance with one embodiment of the present invention, there is provided a technique for migrating data using a self-describing format. According to an embodiment of the technique, a first source data set, which is in a source-specific format and which conforms to a source schema, is read from a source database. Based on the structure of the first source data set, a second source data set, which conforms to the source schema but which is in a self-describing format, is generated. The second source data set is automatically converted to a first target data set, which is in the self-describing format but which conforms to a target schema. Based on the structure of the first target data set, a second target data set, which conforms to the target schema but which is in a target-specific format, is generated. The second target data set is written to a target database.

Abstract: A communication protocol is employed between a movable barrier operator and an associated wall button using the traditional signaling wires connecting them. Implementing the communication protocol using the existing signaling wires also allows backward compatibility with the traditional push wall buttons that have a physical contact switch. In one embodiment, the communication protocol allows bi-directional communication between the moveable barrier operator and the wall button. The bi-directional embodiment of the protocol allows further communications, such as handshaking, signal confirmation and more advanced control between the wall unit and the barrier operator.

Abstract: An integrated circuit package includes a processing core and an internal oscillator. The processing core operates on a set of instructions to carry out predefined processes. The internal oscillator provides a system clock for the integrated circuit package. The internal oscillator has associated therewith an internal control register for controlling the operation of the internal oscillator responsive to control bits of the internal oscillator controlled by the processing core.

Abstract: A low power system is disclosed for working in conjunction with a digital circuit that is disposed between positive and negative terminals. The system includes an internal voltage generator for increasing, for at least a first portion of the digital circuit, a voltage difference between the at least a first portion of the digital circuit and the voltage on at least one of the positive and negative terminals during a low power mode of operation. This allows the voltage across the at least first portion of the digital circuit to be less than the full voltage across the positive and negative terminals.

Abstract: A system for optimizing the power efficiency of a switching power converter operating at a switching frequency includes a digital controller for receiving an analog signal representing an output DC voltage of the switching power converter for comparison to a desired output voltage level and generating switching control signals to control the operation of the power supply to regulate the output DC voltage to said desired output voltage level. At least two of the switching control signals have a dead time between a first edge of a first control signal and a second edge of a second control signal. The dead time is programmable to control a power efficiency of the switching power converter. The switching control signals additionally switch the power supply between a continuous conduction mode and a discontinuous conduction mode responsive to a mode control signal. The operation of the digital controller is parameterized by a set of operating parameters.

Abstract: An integrated system on a chip includes processing circuitry that performs predefined digital processing functions on the chip. The processing circuitry operates responsive to a regulated voltage. An on-chip boost converter generates the regulated voltage responsive to an off-chip voltage provided by an off chip voltage source. The regulated voltage source has a voltage level greater than the off-chip voltage.

Abstract: A method for converting analog data to digital data is disclosed. The method includes operating an analog-to-digital data converter in a tracking mode to sample an input signal and in a convert mode to convert the sampled input signal after sampling to a digital signal. The analog-to-digital data converter is controlled with a controller to operate in different modes of operation by providing at least one step wherein the tracking mode of operation is controlled to initiate at a predetermined time to begin the sampling operation.

Abstract: A system and method for proximity control of a barrier comprises a stationary wireless signal receiving device and a mobile transmitting device. The wireless signal receiving device may monitor at least one transmitting device within a predetermined coverage area and may be a radio frequency receiver or a spread spectrum receiver located near the barrier. In one embodiment, the transmitter device emits a control signal that is received by the receiving device when the transmitter is within a reception range. In one embodiment, the control signal includes transmitter identification information, directional information and position information. In another embodiment, the barrier is closed only after a predetermined delay has lapsed.

Abstract: A power factor correction circuit utilizes a digital controller string comprised of an analog-to-digital converter, which is input to a digital compensator followed by a pulse width modulation circuit for generating a switching pulse. The loop current in a regulator circuit such as a boost regulator is sensed and input to one side of a differential analog-to-digital converter, the other side thereof providing a digital reference current. This digital reference current is derived from comparing the input AC voltage to the regulator with the DC output voltage and processing these two voltages with a PFC algorithm to provide this reference voltage.

Abstract: A system and method for proximity control of a barrier comprises a stationary wireless signal receiving device and a mobile transmitting device. The wireless signal receiving device may monitor at least one transmitting device within a predetermined coverage area and may be a radio frequency receiver or a spread spectrum receiver located near the barrier. In one embodiment, the transmitter device emits a control signal that is received by the receiving device when the transmitter is within a reception range. In one embodiment, the control signal includes transmitter identification information, directional information and position information. In another embodiment, the barrier is closed only after a predetermined delay has lapsed.

Abstract: Disclosed are systems and methods for operating a barrier. In one embodiment, a door operator can be opened or closed by triggering either an internal device (e.g., wall button) or an external device. In one embodiment, if an obstacle is detected when the door is opening or closing, the door will either stop or swing in the reverse direction. In yet a further embodiment, the door operator is implemented using an alternating current (AC) synchronous motor.

Abstract: An area-efficient capacitor-free low-dropout regulator based on a current-feedback frequency compensation technique is disclosed. An implementation of a current feedback block with a single compensation capacitor is used to enable capacitance reduction. The resultant low-dropout regulator does not generally require an off-chip capacitor for stability and is particularly useful for system-on-chip applications.

Abstract: An End-Point Prediction scheme is described for voltage-mode buck regulators to generate adaptive output voltage to integrated-circuit systems. Internal nodal voltages of the regulator controller are predicted and set automatically by the proposed algorithms and circuits. The settling time of the regulator can therefore be significantly reduced for faster dynamic responses, even with dominant-pole compensation.