Patents by Inventor Kae Dong Back

Kae Dong Back has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070024691
    Abstract: An image drum and method of producing the same is provided. The drum includes a drum body having a pair of semi-cylindrical members, each being oppositely bonded and having a bonding surface having electrodes being separated from one another by insulating areas, and line electrodes formed on the periphery; a control unit including conductive parts corresponding to the line electrodes, and nonconductive parts interposed between the conductive parts, and disposed inside the drum body; and a connecting member electrically coupling the line electrodes to the control unit. The method includes cutting a cylindrical member into two semi-cylindrical members; oxidizing the surfaces of the members; forming electrodes on each of the cut surfaces; partially oxidizing a substrate; bonding the two semi-cylindrical members across the substrate such that the electrodes and the conductive parts couple together; and forming line electrodes on the periphery of the members.
    Type: Application
    Filed: April 5, 2006
    Publication date: February 1, 2007
    Inventors: Kyu-ho Shin, Won-kyoung Choi, Jong-kwang Kim, Kae-dong Back, Chang-youl Moon
  • Publication number: 20070013058
    Abstract: A packaging chip formed with plural wafers. The packaging chip includes plural wafers stacked in order and plural interconnection electrodes directly connecting the plural wafers from an upper surface of an uppermost wafer of the plural wafers to the other wafers. At least one or more of the plural wafers mounts a predetermined circuit device thereon. Further, at least one or more wafers of the plural wafers have a cavity of a predetermined size. Meanwhile, the packaging chip further includes plural pads independently arranged on the upper surface of the uppermost wafer one another and electrically connected to the plural interconnection electrodes respectively. Accordingly, the present invention can enhance the performance and reliability of a packaging chip and improve fabrication yield.
    Type: Application
    Filed: July 6, 2006
    Publication date: January 18, 2007
    Inventors: Min-seog Choi, Kae-dong Back, In-sang Song, Woon-bae Kim, Byung-gil Jeong, Kyu-dong Jung
  • Publication number: 20060286798
    Abstract: A cap for a semiconductor device package, including a body formed at a predetermined thickness with a cavity. The cap further includes a first seed layer formed on an inner circumference of a first via hole formed at a predetermined depth from the cavity formation surface of the body, a second seed layer formed on an inner circumference of a second via hole formed at a predetermined depth from the opposite surface to the cavity formation surface of the body, and plating materials filled in the first via hole and the second via hole.
    Type: Application
    Filed: April 28, 2006
    Publication date: December 21, 2006
    Inventors: Moon-chul Lee, Jong-oh Kwon, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
  • Publication number: 20060175707
    Abstract: A wafer level packaging cap and method thereof for a wafer level packaging are provided. The wafer level packaging cap covering a device wafer with a device thereon, includes a cap wafer having on a bottom surface a cavity providing a space for receiving the device, and integrally combined with the device wafer, a plurality of metal lines formed on the bottom surface of the cap wafer to correspond to a plurality of device pads formed on the device wafer to be electrically connected to the device, a plurality of buffer portions connected to the plurality of metal lines and comprising a buffer wafer with a plurality of grooves and a metal filled in the plurality of grooves, a plurality of connection rods electrically connected to the plurality of buffer portions and penetrating the cap wafer from a top portion of the buffer portion, and a plurality of cap pads formed on a top surface of the cap wafer and electrically connected to a plurality of connection rods.
    Type: Application
    Filed: January 26, 2006
    Publication date: August 10, 2006
    Inventors: Moon-chul Lee, Woon-bae Kim, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
  • Publication number: 20060134533
    Abstract: A method of fabricating a one-way transparent optical system by which external light is effectively intercepted and internal light passes nearly without loss is provided. The method includes: forming a silver halide on a transparent substrate; aligning a mask in which a predetermined pattern is formed, on the transparent substrate and exposing the silver halide using the mask; developing and fixing the exposed silver halide and forming a plurality of light-absorbing materials on the transparent substrate; and forming protrusion structures having a shape of a convex lens shape for refracting incident light toward a corresponding light-absorbing material of the light-absorbing materials, on the transparent substrate on which the light-absorbing materials are formed.
    Type: Application
    Filed: December 7, 2005
    Publication date: June 22, 2006
    Inventors: O-gweon Seo, Kae-dong Back, Chang-seung Lee, Kyu-sik Kim, Duck-su Kim, Byoung-ho Cheong