Abstract: A fan module comprises a frame, a wire-stopping structure, an impeller and a circuit board. The frame includes a frame wall, a base, a plurality of static blades and a connector. A wire groove formed on an outside of the frame wall to accommodate a wire. The static blades are radially connected to the base and the frame wall. The connector is formed on the outside of the frame wall and extended from one end of the wire groove to the base along one of the static blades. The connector includes a plurality of pins. The wire-stopping board is fixed to the frame wall to cover the wire groove. The impeller is disposed in the frame. The circuit board is disposed in the frame and located on the base. The circuit board includes a plurality of pin holes, and the pin holes are electrically connected to the pins.

Abstract: A communication apparatus includes an input terminal, an output terminal, and an interference reduction circuit. The interference reduction circuit is coupled between the input terminal and the output terminal. The interference reduction circuit receives a time-varying data signal. The interference reduction circuit acquires first partial data from the data signal at a first time, and generates a first level-shifted result and a second level-shifted result according to the first partial data. The interference reduction circuit is further configured to acquire second partial data from the data signal at a second time. The interference reduction circuit selects one of the first level-shifted result and the second level-shifted result as a selected result according to the second partial data, and sends the selected result to the output terminal.

Abstract: A multiple output rectifier includes a comparator-based active rectification circuit and a controller, wherein the controller is coupled to the comparator-based active rectification circuit. The comparator-based active rectification circuit is used for generating and outputting each output voltage of a plurality of output voltages according to an input voltage, the each output voltage, and a control signal corresponding to the each output voltage. The controller is used for generating the control signal according to the each output voltage and a reference voltage corresponding to the each output voltage.

Abstract: A fan includes an impeller, a drive device, and a frame structure. The driving device drives the impeller to rotate, and the frame structure accommodates the driving device. The frame structure includes a frame body, a first frame, a second frame, a base and a plurality of supports. The frame body has first engaging portions and second engaging portions, which are disposed annularly at the upper end and the lower end of the frame body, respectively. The first frame is mounted on the frame body and disposed corresponding to the first engaging portions. The second frame is mounted on the frame body and disposed corresponding to the second engaging portions. The base is disposed within the frame body and located adjacent to the second frame. The supports are disposed around the base. The material of the frame body is different from that of the first and second frames.

Abstract: A method of processing an image data for an image processing device includes a plurality of steps. The steps include receiving the image data; storing the image data in a frame buffer of the image processing device; performing a signal processing procedure on the image data obtained from the frame buffer, to generate a final display data; restoring the final display data in the frame buffer; and entering a power saving mode after the final display data is restored in the frame buffer. In the power saving mode, the image processing device performs the following steps: turning off the signal processing circuit; and outputting the final display data restored in the frame buffer, to display the final display data.

Abstract: A method of processing an image data for an image processing device includes a plurality of steps. The steps include receiving the image data; storing the image data in a frame buffer of the image processing device; performing a signal processing procedure on the image data obtained from the frame buffer, to generate a final display data; restoring the final display data in the frame buffer; and entering a power saving mode after the final display data is restored in the frame buffer. In the power saving mode, the image processing device performs the following steps: turning off the signal processing circuit; and outputting the final display data restored in the frame buffer, to display the final display data.

Abstract: A cooling structure integrated with an electric motor and a controller includes a shell and a rear water jacket. The controller includes a power module and a control module. The electric motor has a rotor and a stator. The shell, shaped as a cylinder, is to sleeve the stator. The rear water jacket includes at least one assembly hole. The assembly hole is to allow at least one conductive pillar to penetrate therethrough. The rear water jacket, mounted to an axial end of the shell, is furnished with a plurality of rear water-jacket waterways. The stator electrically couples one end of the conductive pillar, while another end of the conductive pillar is connected with the power module.

Abstract: Self-configured, power-aware circuitry configured to enhance power efficiency within integrated circuitry by self-calibrating the power consumption utilized within the integrated circuitry according to the requirements of an application program running within the integrated circuitry. The power consumption is self-calibrated within the integrated circuitry on a per application-based manner so that the integrated circuitry can be implemented with a plurality of various generalized functionalities, each of which may or may not be utilized while a specific application program is running within the integrated circuitry. Power consumption within the integrated circuitry is reduced by independently and dynamically controlling multiple power sections delineated within the integrated circuitry.

Abstract: An integrated power-connected apparatus having a driving controller and an electric motor includes an electric motor, a driving controller, at least one conductive pillar, a cooler and at least one electric insulating tube. The electric motor has a rotor and a stator. The driving controller includes a power module and a control module. The at least one conductive pillar has one end thereof to electrically couple the stator, while another end thereof connects the power module. The cooler, located between the electric motor and the power module, allows the at least one conductive pillar to penetrate therethrough. The at least one electric insulating tube sleeves the at least one conductive pillar and isolates electrically the at least one conductive pillar from the control module and the cooler.

Abstract: A cooling structure integrated with an electric motor and a controller includes a shell and a rear water jacket. The controller includes a power module and a control module. The electric motor has a rotor and a stator. The shell, shaped as a cylinder, is to sleeve the stator. The rear water jacket includes at least one assembly hole. The assembly hole is to allow at least one conductive pillar to penetrate therethrough. The rear water jacket, mounted to an axial end of the shell, is furnished with a plurality of rear water-jacket waterways. The stator electrically couples one end of the conductive pillar, while another end of the conductive pillar is connected with the power module.

Abstract: An electric rotating machine includes a stator housing, a rotor set, a stator set, at least one controlling room, and at least one drive controller. The rotor set is located inside the stator housing. The stator set is located inside the stator housing by surrounding the rotor set. The at least one controlling room is located aside to the stator housing. The at least one drive controller is located inside the controlling room.

Abstract: A method includes causing a carrier of an overhead hoist transfer system (OHT) to latch onto a top latch of a first semiconductor wafer transportation pod, the first semiconductor wafer transportation pod comprising a top latching mechanism configured to selectively connect to another pod or a carrier mechanism of an overhead hoist transfer (OHT) system, and a bottom latching mechanism configured to selectively connect to another pod. The method further includes rotating the first semiconductor wafer transportation pod such that the top latching mechanism of the first semiconductor wafer transportation pod latches on to a second semiconductor wafer transportation pod.

Abstract: A fan frame includes a frame body and a metal base. The frame body has a frame wall. The metal base includes a center portion and a plurality of static blades. The static blades radially extend from the center portion outwardly and connect to the frame wall. Another fan frame includes a base and a frame body. The frame body includes a metal frame wall and a plurality of static blades. The static blades radially extend from the metal frame wall inwardly and connect to the base. Another fan frame includes a frame body, a base and a plurality of static blades. The frame body has a frame wall. One end of each static blade connects to the base, and the other end of each static blade connects to the frame wall. At least one part of the static blades is made of metal.

Abstract: A communication apparatus includes an input terminal, an output terminal, and an interference reduction circuit. The interference reduction circuit is coupled between the input terminal and the output terminal. The interference reduction circuit receives a time-varying data signal. The interference reduction circuit acquires first partial data from the data signal at a first time, and generates a first level-shifted result and a second level-shifted result according to the first partial data. The interference reduction circuit is further configured to acquire second partial data from the data signal at a second time. The interference reduction circuit selects one of the first level-shifted result and the second level-shifted result as a selected result according to the second partial data, and sends the selected result to the output terminal.

Abstract: A fan frame module comprises a frame and a wire-stopping structure. In the frame, an outer wall is divided into a first side section, a first mid section, a central section, a second mid section and a second side section in a first direction. The extension direction of the major axis of the central section is parallel to the central axis of the frame, and the first direction is perpendicular to the extension direction of the major axis of the central section. A wire groove is formed on the first mid section to accommodate a wire. A fastening portion is disposed on one side of the wire groove. A positioning portion is disposed on the other one side of the wire groove. The wire-stopping structure is held by the fastening portion and the positioning portion, and fixed to the outer wall.

Abstract: A multiple output rectifier includes a comparator-based active rectification circuit and a controller, wherein the controller is coupled to the comparator-based active rectification circuit. The comparator-based active rectification circuit is used for generating and outputting each output voltage of a plurality of output voltages according to an input voltage, the each output voltage, and a control signal corresponding to the each output voltage. The controller is used for generating the control signal according to the each output voltage and a reference voltage corresponding to the each output voltage.

Abstract: An electric motor includes a casing, a stator, a rotor and a first coolant guiding structure. The stator is stored in a storage space of the casing. The stator includes a stator yoke and winding sets. The stator yoke has first side, second side, annular external surface and guiding channel. The first coolant guiding structure is disposed close to the winding sets and an inlet channel. The first coolant guiding structure has first radially guiding channel and first axially guiding channel. Two ends of the first radially guiding channel respectively have a first radial inlet and a first radial outlet. The first radial inlet is connected to the first axially guiding channel in order to receive coolant from the first axially guiding channel. The first radial outlet is aligned with at least one of the winding sets in order to supply coolant to the winding sets.

Abstract: A light-trapping cancer cell stage testing method includes: measuring a first average escape velocity or range of first cancer cells and a second average escape velocity or range of second cancer cells whose stage is known and differ from that of the first cancer cells and whose types are known; utilizing the first average escape velocity and the second average escape velocity to calculate a reference ratio to build a database; selecting stage-unknown cancer cells and measuring an escape velocity of the stage-unknown cancer cells (type-known); utilizing the escape velocity of the stage-unknown cancer cells and an escape velocity of reference-stage cancer cells to calculate a ratio; and determining a stage of the stage-unknown cancer cells with a result comparing the ratio of the escape velocities for the stage-unknown cancer cells with the reference ratios stored in the database.

Abstract: A method includes causing a carrier of an overhead hoist transfer system (OHT) to latch onto a top latch of a first semiconductor wafer transportation pod, the first semiconductor wafer transportation pod comprising a top latching mechanism configured to selectively connect to another pod or a carrier mechanism of an overhead hoist transfer (OHT) system, and a bottom latching mechanism configured to selectively connect to another pod. The method further includes rotating the first semiconductor wafer transportation pod such that the top latching mechanism of the first semiconductor wafer transportation pod latches on to a second semiconductor wafer transportation pod.

Abstract: Systems and methods are provided for a sense amplifier/write driver circuit. A system includes a set of transistors responsive to a memory cell, the set of transistors configured to operate as a sense amplifier in a first mode and to operate as a write driver in a second mode. One or more switches are configured to switch the set of transistors from the first mode to the second mode based on a control signal. Particular transistors of the set of transistors are configured by the one or more switches to amplify and retain data at a pair of input/output nodes for a period of time in the first mode. The particular transistors are further configured by the one or more switches to drive data to the pair of input/output nodes in the second mode.