Abstract: A structure comprising a first doped region, a second doped region, a third doped region, and a first shallow trench isolation structure formed within a substrate. The first doped region comprises a first dopant having a first polarity. The second doped region forms a first electrode of a capacitor. The third doped region forms a second electrode of the capacitor. Each of the second doped region and the third doped region comprises a second dopant having a second polarity. The first shallow trench isolation structure is formed between the second doped region and the third doped region. The capacitor comprises a main capacitance. The structure comprises a first parasitic capacitance and a second parasitic capacitance. The first parasitic capacitance is about equal to the second parasitic capacitance.

Abstract: A circuit and method for monitoring a frequency divider. The circuit including a phase locked loop circuit including a voltage controlled oscillator and a feedback frequency divider, an output of the voltage controlled oscillator connected to an input of the feedback frequency divider, and output of the feedback frequency divider coupled to an input of the voltage controlled oscillator; and a frequency divider monitor having a first input, a second input and an output, the first input of the frequency divider monitor connected to the output of the voltage controlled oscillator and the second input of the frequency divider monitor coupled to an output of the feedback frequency divider.

Abstract: A structure and associated method for forming a structure. The structure comprises a first doped region, a second doped region, a third doped region, and a first shallow trench isolation structure formed within a substrate. The first doped region comprises a first dopant having a first polarity. The second doped region forms a first electrode of a capacitor. The third doped region forms a second electrode of the capacitor. Each of the second doped region and the third doped region comprises a second dopant having a second polarity. The first shallow trench isolation structure is formed between the second doped region and the third doped region. The capacitor comprises a main capacitance. The structure comprises a first parasitic capacitance and a second parasitic capacitance. The first parasitic capacitance is about equal to the second parasitic capacitance.

Abstract: An inductor formed on an integrated circuit chip including one or more inner layers between two or more outer layers, inductor metal winding turns included in one or more inner layers, and a magnetic material forming the two or more outer layers and the one or more inner layers. In one embodiment, the magnetic material is a photoresist paste having magnetic particles. In another embodiment, the magnetic material is a series of magnetic metallic strips disposed on each of first and second portions of the two or more outer layers and on each of the one or more inner layers. The series of magnetic metallic strips on the first and second portions form a grid pattern. Other embodiments include an adjustable controlled compound deposit and control windings with adjustable electrical currents.

Abstract: Wafer-level testing is performed on an electronic device to be used in an optical communications system. An optical test signal is generated and is provided to a first photo detector. An electrical output of the first photo detector is supplied to the electronic device on the wafer. An electrical output from the electronic device on the wafer is used to drive a light source. An optical output of the light source is supplied to a second photo detector and an electrical signal output from the second photo detector is examined.

Abstract: An inductor formed on an integrated circuit chip including one or more inner layers (12) between two or more outer layers (14), inductor metal winding turns (16) included in one or more inner layers (12), and a magnetic material forming the two or more outer layers (14) and the one or more inner layers (12). In one embodiment, the magnetic material is a photoresist paste having magnetic particles. In another embodiment, the magnetic material is a series of magnetic metallic strips (32 and 36) disposed on each of the first and second portions (30 and 34, respectively) of the two or more outer layers (14) and on each of the one or more inner layers (12). The series of magnetic metallic strips on the first and second portions (30, 34) form a grid pattern. Other embodiments include an adjustable controlled compound deposit and control windings with adjustable electrical currents.

Abstract: Wafer-level testing is performed on an electronic device to be used in an optical communications system. An optical test signal is generated and is provided to a first photo detector. An electrical output of the first photo detector is supplied to the electronic device on the wafer. An electrical output from the electronic device on the wafer is used to drive a light source. An optical output of the light source is supplied to a second photo detector and an electrical signal output from the second photo detector is examined.

Abstract: A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits. The phase monitor detects phase differences between signals output by the circuits. A controller connected to the delay circuitry, the phase monitor, and the controller adjust the delay circuitry to compensate for the phase differences.

Abstract: An inductor formed on an integrated circuit chip including one or more inner layers (12) between two or more outer layers (14), inductor metal winding turns (16) included in one or more inner layers (12), and a magnetic material forming the two or more outer layers (14) and the one or more inner layers (12). In one embodiment, the magnetic material is a photoresist paste having magnetic particles. In another embodiment, the magnetic material is a series of magnetic metallic strips (32 and 36) disposed on each of the first and second portions (30 and 34, respectively) of the two or more outer layers (14) and on each of the one or more inner layers (12). The series of magnetic metallic strips on the first and second portions (30, 34) form a grid pattern. Other embodiments include an adjustable controlled compound deposit and control windings with adjustable electrical currents.

Abstract: Wafer-level testing is performed on an electronic device to be used in an optical communications system. An optical test signal is generated and is provided to a first photo detector. An electrical output of the first photo detector is supplied to the electronic device on the wafer. An electrical output from the electronic device on the wafer is used to drive a light source. An optical output of the light source is supplied to a second photo detector and an electrical signal output from the second photo detector is examined.

Abstract: Wafer-level testing is performed on an electronic device to be used in an optical communications system. An optical test signal is generated and is provided to a first photo detector. An electrical output of the first photo detector is supplied to the electronic device on the wafer. An electrical output from the electronic device on the wafer is used to drive a light source. An optical output of the light source is supplied to a second photo detector and an electrical signal output from the second photo detector is examined.

Abstract: An input buffer for an optical receiver or transceiver which provides symmetrical hysteresis and zero static current, comprises two field effect transistors (FETs) which form the basic buffer logic circuit, two FETs which respectively provide offset voltages to the buffer logic FETs, and two FETs which provide positive feedback. In the preferred embodiment the input buffer provides multiple-channels, each channel comprising a component inverter designed to provide zero static current and symmetrical hysteresis for a different input signal mode.

Abstract: A method and structure for an apparatus for maintaining signal integrity between integrated circuits residing on a printed circuit board. The apparatus has adjustable delay circuitry within the circuits and the adjustable delay circuitry adjusts the timing of signals processed within the circuit. A phase monitor connects to the circuits. The phase monitor detects phase differences between signals output by the circuits. A controller connected to the delay circuitry, the phase monitor, and the controller adjust the delay circuitry to compensate for the phase differences.

Abstract: Wafer-level testing is performed on an electronic device to be used in an optical communications system. An optical test signal is generated and is provided to a first photo detector. An electrical output of the first photo detector is supplied to the electronic device on the wafer. An electrical output from the electronic device on the wafer is used to drive a light source. An optical output of the light source is supplied to a second photo detector and an electrical signal output from the second photo detector is examined.

Abstract: An input buffer for an optical receiver or transceiver which provides symmetrical hysteresis and zero static current, comprises two field effect transistors (FETs) which form the basic buffer logic circuit, two FETs which respectively provide offset voltages to the buffer logic FETs, and two FETs which provide positive feedback. In the preferred embodiment the input buffer provides multiple-channels, each channel comprising a component inverter designed to provide zero static current and symmetrical hysteresis for a different input signal mode.

Abstract: An infrared communication device with an adaptive configuration controller for programming system parameter settings with command codes. The adaptive configuration controller comprises a number of shift registers and control circuits. The registers store command codes for configuring system parameters including bandwidth, sensitivity and LED drive current. The codes are obtained from an external source. The capability to program the system parameter settings allows the communication device to be adapted or reconfigured for optimal operation in response to changes in the environment without the need for removing or adding external components.

Abstract: A low power selector circuit is described which permits control of multiple configurations of an integrated circuit chip without external pull-up or pull-down resistors or additional lead frame pins. The selector circuit has a gated pull-up resistor formed on the chip, controlled by a sampling latch, When enabled by a power-on reset circuit, the latch samples voltage on the terminal input pad; the latch shuts off the pull-up resistor when a grounded terminal input pad is detected. This circuit thus samples the voltage of a pad of the chip to determine whether it has been grounded; this information may be used to control various chip functions. Very little power consumption is required.

Abstract: This invention provides a solution to the problem of determining how long the peak value detected for the first pulse be kept, and when should it be updated. In infrared communication, the communication distance may vary over time during the transmission. For instance in a mobile infrared telephone the users generally are moving with respect to each other. The signal amplitude changes within a very large range over time and the receiver expected to operate in this environment must also handle a large number of different communication protocols. It uses the instant signal as a basis for adjusting the threshold. The present invention is capable of accepting a wide input dynamic range of signals up to and beyond five orders of magnitude (50 dB). This is accomplished while overcoming the difficulties presented by many communications protocols, by providing a technique in which the output pulse width of an amplified photo detector input is not strongly dependent upon the input signal amplitude.