Patents by Inventor Kai-Hung Cheng

Kai-Hung Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11570339
    Abstract: According to the disclosure, a photodiode package structure is provided. The photodiode package structure includes a substrate, a photodiode chip on the substrate, a plurality of shutters above the photodiode chip, and a seal member covering the substrate and the photodiode chip, in which the shutters are embedded in the seal member.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: January 31, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Kai-Hung Cheng, Fu-Han Ho
  • Publication number: 20230027508
    Abstract: Provided are a resistive random access memory (RRAM) and a manufacturing method thereof. The resistive random access memory includes multiple unit structures disposed on a substrate. Each of the unit structures includes a first electrode, a first metal oxide layer, and a spacer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. The spacer is disposed on sidewalls of the first electrode and the first metal oxide layer. In addition, the resistive random access memory includes a second metal oxide layer and a second electrode. The second metal oxide layer is disposed on the unit structures and is connected to the unit structures. The second electrode is disposed on the second metal oxide layer.
    Type: Application
    Filed: August 6, 2021
    Publication date: January 26, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Kai Jiun Chang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20220393078
    Abstract: A micro LED structure includes a first micro LED chip having opposite first and second sides, a second micro LED chip adjacent to the first side of the second micro LED chip, a third micro LED chip adjacent to the first side of the first micro LED chip, and optical structures respectively over the first micro LED chip, the second micro LED chip and the third micro LED chip. Each of the first, second and third micro LED chip includes a semiconductor stack, a metal pad and a reflective coating layer. The semiconductor stack includes a first semiconductor layer, an active layer in contact with the first semiconductor layer, and a second semiconductor layer in contact with the active layer. The metal pad is in contact with the first semiconductor layer, and the reflective coating layer is disposed around sidewalls of the semiconductor stack.
    Type: Application
    Filed: June 2, 2021
    Publication date: December 8, 2022
    Inventors: Kai-Hung CHENG, Fu-Han HO
  • Publication number: 20220328360
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 13, 2022
    Inventors: Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin, Jei Ming Chen
  • Publication number: 20220278071
    Abstract: An apparatus for forming a package structure is provided. The apparatus includes a processing chamber for bonding a first package component and a second package component. The apparatus also includes a bonding head disposed in the processing chamber. The bonding head includes a plurality of vacuum tubes communicating with a plurality of vacuum devices. The apparatus further includes a nozzle connected to the bonding head and configured to hold the second package component. The nozzle includes a plurality of first holes that overlap the vacuum tubes. The nozzle also includes a plurality of second holes offset from the first holes, wherein the second holes overlap at least two edges of the second package component. In addition, the apparatus includes a chuck table disposed in the processing chamber, and the chuck table is configured to hold and heat the first package component.
    Type: Application
    Filed: July 8, 2021
    Publication date: September 1, 2022
    Inventors: Kai Jun ZHAN, Chang-Jung HSUEH, Hui-Min HUANG, Wei-Hung LIN, Ming-Da CHENG
  • Publication number: 20220268690
    Abstract: An optical detection apparatus includes a substrate, a light source, a light sensor, a light-guiding structure. The substrate has a top surface. The light source on the top surface is configured to generate detection light toward an object over the light source. The light sensor is located on the top surface. The light-guiding structure is above the top surface and at least partially above the light source. A central axis of the light-guiding structure is vertical to the top surface, and the light source and the light sensor are at opposite sides relative to the central axis. The light-guiding structure is configured to deflect the detection light from one of the opposite sides at which the light source is located to another one of the opposite side at which the light sensor is located, such that the detection light reflected by the object moves toward the light sensor.
    Type: Application
    Filed: April 29, 2021
    Publication date: August 25, 2022
    Inventors: Fu-Han HO, Kai-Hung CHENG
  • Publication number: 20220227728
    Abstract: The present invention discloses a series of nuclear medicine tracers that are combined with brain microtubule-associated protein Tau targeting compounds to produce a group of compounds of nuclear medicine that can be utilized for imaging of microtubule-associated protein Tau. When the positrons released by the decay encounter the electrons of the cells in the sample, utilizing the positron decay characteristics of fluorine-18 or iodine-124 isotope to generate mutual destruction reactions, a pair of opposite gamma rays is formed which are imaged by positron emission tomography. The compounds can be applied for the in vivo detection of microtubule-associated protein Tau deposits in the brain. The invention provides a strategy for diagnosis of Alzheimer's disease and a method to measure the efficacy of therapeutic drugs targeting microtubule-associated protein Tau.
    Type: Application
    Filed: January 19, 2021
    Publication date: July 21, 2022
    Inventors: MING-HSIN LI, KAI-HUNG CHENG, SHENG-NAN LO, SHIH-WEI LO, YUAN-RUEI HUANG, JENN-TZONG CHEN
  • Patent number: 11380593
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: July 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin, Jei Ming Chen
  • Publication number: 20220103726
    Abstract: According to the disclosure, a photodiode package structure is provided. The photodiode package structure includes a substrate, a photodiode chip on the substrate, a plurality of shutters above the photodiode chip, and a seal member covering the substrate and the photodiode chip, in which the shutters are embedded in the seal member.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Inventors: Kai-Hung CHENG, Fu-Han HO
  • Patent number: 11202577
    Abstract: A system and method for monitoring cardiovascular and brain functions in combination with a physiological detection device, which uses a smart wearable device to detect physiological data such as heart rate and pulse pressure of a user, and transmits the physiological data to an arithmetic function. An electronic device in which a preset function and a calculation formula are built in, and the physiological data can be converted into corresponding determination parameters to monitor the possibility and risk of cardiovascular diseases and neurodegenerative diseases.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: December 21, 2021
    Inventors: Ming-Hsin Li, Kai-Hung Cheng, Shih-Wei Lo
  • Patent number: 11195717
    Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: December 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Sheng Li, Chia-Hui Lin, Kai Hung Cheng, Yao-Hsu Sun, Wen-Cheng Wu, Bo-Cyuan Lu, Sung-En Lin, Tai-Chun Huang
  • Publication number: 20210121074
    Abstract: A system and method for monitoring cardiovascular and brain functions in combination with a physiological detection device, which uses a smart wearable device to detect physiological data such as heart rate and pulse pressure of a user, and transmits the physiological data to an arithmetic function. An electronic device in which a preset function and a calculation formula are built in, and the physiological data can be converted into corresponding determination parameters to monitor the possibility and risk of cardiovascular diseases and neurodegenerative diseases.
    Type: Application
    Filed: October 28, 2019
    Publication date: April 29, 2021
    Inventors: MING-HSIN LI, KAI-HUNG CHENG, SHIH-WEI LO
  • Publication number: 20200411386
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
    Type: Application
    Filed: September 14, 2020
    Publication date: December 31, 2020
    Inventors: Shih-Wen Huang, Jaming Chang, Kai Hung Cheng, Chia-Hui Lin, Jei Ming Chen
  • Publication number: 20200373154
    Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 26, 2020
    Inventors: Dong-Sheng Li, Chia-Hui Lin, Kai Hung Cheng, Yao-Hsu Sun, Wen-Cheng Wu, Bo-Cyuan Lu, Sung-En Lin, Tai-Chun Huang
  • Patent number: 10777466
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: September 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Wen Huang, Chia-Hui Lin, Jaming Chang, Jei Ming Chen, Kai Hung Cheng
  • Patent number: 10734227
    Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: August 4, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Sheng Li, Chia-Hui Lin, Kai Hung Cheng, Yao-Hsu Sun, Wen-Cheng Wu, Bo-Cyuan Lu, Sung-En Lin, Tai-Chun Huang
  • Patent number: 10720430
    Abstract: A method includes etching a semiconductor substrate to form trenches, with a portion of the semiconductor substrate between the trenches being a semiconductor strip, and depositing a dielectric dose film on sidewalls of the semiconductor strip. The dielectric dose film is doped with a dopant of n-type or p-type. The remaining portions of the trenches are filled with a dielectric material. A planarization is performed on the dielectric material. Remaining portions of the dielectric dose film and the dielectric material form Shallow Trench Isolation (STI) regions. A thermal treatment is performed to diffuse the dopant in the dielectric dose film into the semiconductor strip.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: July 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wen Huang, Chia-Hui Lin, Shin-Yeu Tsai, Kai Hung Cheng
  • Publication number: 20200144258
    Abstract: A method includes etching a semiconductor substrate to form trenches, with a portion of the semiconductor substrate between the trenches being a semiconductor strip, and depositing a dielectric dose film on sidewalls of the semiconductor strip. The dielectric dose film is doped with a dopant of n-type or p-type. The remaining portions of the trenches are filled with a dielectric material. A planarization is performed on the dielectric material. Remaining portions of the dielectric dose film and the dielectric material form Shallow Trench Isolation (STI) regions. A thermal treatment is performed to diffuse the dopant in the dielectric dose film into the semiconductor strip.
    Type: Application
    Filed: December 26, 2019
    Publication date: May 7, 2020
    Inventors: Shih-Wen Huang, Chia-Hui Lin, Shin-Yeu Tsai, Kai Hung Cheng
  • Publication number: 20200075320
    Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.
    Type: Application
    Filed: June 3, 2019
    Publication date: March 5, 2020
    Inventors: Dong-Sheng Li, Chia-Hui Lin, Kai Hung Cheng, Yao-Hsu Sun, Wen-Cheng Wu, Bo-Cyuan Lu, Sung-En Lin, Tai-Chun Huang
  • Patent number: 10522541
    Abstract: A method includes etching a semiconductor substrate to form trenches, with a portion of the semiconductor substrate between the trenches being a semiconductor strip, and depositing a dielectric dose film on sidewalls of the semiconductor strip. The dielectric dose film is doped with a dopant of n-type or p-type. The remaining portions of the trenches are filled with a dielectric material. A planarization is performed on the dielectric material. Remaining portions of the dielectric dose film and the dielectric material form Shallow Trench Isolation (STI) regions. A thermal treatment is performed to diffuse the dopant in the dielectric dose film into the semiconductor strip.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wen Huang, Chia-Hui Lin, Shin-Yeu Tsai, Kai Hung Cheng