Abstract: A body structure for a vehicle includes an A-pillar and a side sill, wherein the A-pillar includes a vertical front pillar; a front roof pillar extending from an upper end of the vertical front pillar toward an upper rear side thereof; a first reinforcing plate provided in the vertical front pillar and extending in the same direction with the vertical front pillar; and a second reinforcing plate provided in the front roof pillar extending in the same direction with the front roof pillar. The side sill is connected to a lower end of the vertical front pillar and extending along a horizontal direction. The first reinforcing plate is formed to cover a front door hinge mounting portion in the A-pillar and a connection portion of the vertical front pillar and the side sill. An uncoupled portion is formed between the second reinforcing plate and the first reinforcing plate.

Abstract: Structures and related techniques for singulating GaN-on-Si wafers are disclosed. In one aspect, a semiconductor wafer includes a silicon layer, and a gallium nitride (GaN) layer disposed on the silicon layer and defining a plurality of trenches that each extend to the silicon layer. In another aspect, the GaN layer includes one or more gallium nitride layers of different compositions. In yet another aspect, the wafer includes a plurality of dielectric layers disposed on the GaN layer. In yet another aspect, each of the plurality of trenches has a depth that is equal to a sum of a thickness of the GaN layer and a thickness of the plurality of the dielectric layers.

Abstract: A body structure for a vehicle includes an A-pillar and a side sill, wherein the A-pillar includes a vertical front pillar; a front roof pillar extending from an upper end of the vertical front pillar toward an upper rear side thereof; a first reinforcing plate provided in the vertical front pillar and extending in the same direction with the vertical front pillar; and a second reinforcing plate provided in the front roof pillar extending in the same direction with the front roof pillar. The side sill is connected to a lower end of the vertical front pillar and extending along a horizontal direction. The first reinforcing plate is formed to cover a front door hinge mounting portion in the A-pillar and a connection portion of the vertical front pillar and the side sill. An uncoupled portion is formed between the second reinforcing plate and the first reinforcing plate.

Abstract: The present invention relates to a cell differentiation medium composition, a high secretion insulin-producing cells and a preparation method thereof. The high secretion insulin-producing cells obtained by using the cell differentiation medium composition to induce stem cell differentiated under specific conditions can secrete a large amount of insulin in a short time, and when the high-secreting insulin-producing cells are transplanted into the human body, they are not easy to be swallowed by macrophages, which can improve the survival rate of the insulin-producing cells and prolong the time of insulin secretion thereby.

Abstract: The disclosure provides a method for treating a surface of a carbon fiber composite material, comprising the steps of: (1) pretreating a carbon fiber reinforced resin-based composite material; (2) spraying transparent powder to the surface of the carbon fiber reinforced resin-based composite material and curing it; (3) polishing the surface of the carbon fiber reinforced resin-based composite material after the transparent powder is cured; (4) spraying transparent powder to the surface of the carbon fiber reinforced resin-based composite material after the transparent powder thereon is cured and curing it; (5) polishing, cleaning and baking; and (6) spraying a clear lacquer to the surface of the carbon fiber reinforced resin-based composite material after the transparent powder is cured and curing it.

Abstract: The disclosure provides a method for treating a surface of a carbon fiber composite material, comprising the steps of: (1) pretreating a carbon fiber reinforced resin-based composite material; (2) spraying transparent powder to the surface of the carbon fiber reinforced resin-based composite material and curing it; (3) polishing the surface of the carbon fiber reinforced resin-based composite material after the transparent powder is cured; (4) spraying transparent powder to the surface of the carbon fiber reinforced resin-based composite material after the transparent powder thereon is cured and curing it; (5) polishing, cleaning and baking; and (6) spraying a clear lacquer to the surface of the carbon fiber reinforced resin-based composite material after the transparent powder is cured and curing it.

Abstract: An integrated circuit device includes a transfer-gate transistor, and a photo diode connected to a source/drain region of the transfer-gate transistor. An electrical fuse is electrically coupled to a gate of the transfer-gate transistor. A diode is electrically coupled to the electrical fuse.

Abstract: This disclosure provides pixel arrays made up of a clear pixel and a color pixel. The color pixel includes a first photo-detecting element and a color pixel access transistor to selectively couple the first photo-detecting element to a first charge-storage node. The clear pixel includes a second photo-detecting element and a clear pixel access transistor to selectively couple the second photo-detecting element to a second charge-storage node. The color pixel access transistor transfers a first charge per unit time between the first photo-detecting element and the first charge-storage node. The clear pixel access transistor transfers a second charge per unit time between the clear pixel access transistor and the second charge-storage node. The first charge per unit time is less than the second charge per unit time to mitigate blooming. In other embodiments, the clear pixel includes an excess-charge transfer path that couples the clear pixel to a DC supply node to mitigate blooming.

Abstract: This disclosure provides pixel arrays made up of a clear pixel and a color pixel. The color pixel includes a first photo-detecting element and a color pixel access transistor to selectively couple the first photo-detecting element to a first charge-storage node. The clear pixel includes a second photo-detecting element and a clear pixel access transistor to selectively couple the second photo-detecting element to a second charge-storage node. The color pixel access transistor transfers a first charge per unit time between the first photo-detecting element and the first charge-storage node. The clear pixel access transistor transfers a second charge per unit time between the clear pixel access transistor and the second charge-storage node. The first charge per unit time is less than the second charge per unit time to mitigate blooming. In other embodiments, the clear pixel includes an excess-charge transfer path that couples the clear pixel to a DC supply node to mitigate blooming.

Abstract: A disk drive having a disk, a head actuated over the disk, a volatile semiconductor memory (VSM), a command queue, and control circuitry operable to receive a plurality of write commands from a host, store the plurality of write commands in the command queue, store write data for the plurality of write commands in the VSM, and flush, from the VSM to the disk, a portion of the write data corresponding to a predetermined number of tracks.

Abstract: An integrated circuit device includes a transfer-gate transistor, and a photo diode connected to a source/drain region of the transfer-gate transistor. An electrical fuse is electrically coupled to a gate of the transfer-gate transistor. A diode is electrically coupled to the electrical fuse.

Abstract: A data storage device is disclosed comprising a non-volatile memory comprising a plurality of sectors. At least one alignment zone is defined in the non-volatile memory comprising a plurality of chunks including a plurality of data chunks and a plurality of pad chunks, wherein each chunk comprises a plurality of sectors. Each sector is operable to store X host blocks, the alignment zone comprises at least X?1 pad chunks, and control circuitry is operable to shift the data chunks of the alignment zone by a number of chunks equal to or less than X?1 plus a corresponding offset.

Abstract: Described herein is a framework for coordinating transportation. In accordance with one implementation, the framework creates or selects a virtual transportation stand in response to a commuter request. The virtual transportation stand may be created or selected based at least in part on current location information associated with a mobile device. Information associated with the virtual transportation stand may then be provided to the commuter mobile device and a vehicle notification device. The virtual transportation stand may further be removed if it is no longer in demand.

Abstract: An integrated circuit device includes a transfer-gate transistor, and a photo diode connected to a source/drain region of the transfer-gate transistor. An electrical fuse is electrically coupled to a gate of the transfer-gate transistor. A diode is electrically coupled to the electrical fuse.

Abstract: A semiconductor structure includes a first capacitor and a second capacitor. The first capacitor includes a plurality of first units and each first unit includes a plurality of first finger electrodes. The second capacitor includes a plurality of second units and each second unit includes a plurality of second finger electrodes. The first units and the second units are alternately arranged to form an array. The semiconductor structure further includes a plurality of first connecting lines and a plurality of second connecting lines being parallel with each other. The first connecting lines are electrically connected to the first finger electrodes, and the second connecting lines are electrically connected to the second finger electrodes. The first finger electrodes and its adjacent first connecting lines form a straight line, and the second finger electrodes and its adjacent second connecting lines form another straight line.

Abstract: A data storage device is disclosed comprising a non-volatile memory comprising a plurality of sectors. A partition map is evaluated that identifies a partition accessed through a plurality of logical block addresses (LBAs), where each LBA maps to a fraction of a sector. A partition offset is determined for the partition relative to a boundary of one of the sectors. N write commands are received each having a write offset relative to a corresponding sector. When the write offset for X of the N write commands matches the partition offset, at least part of the partition is moved to align at least part of the partition to a boundary of one of the sectors.

Abstract: An integrated circuit device includes a transfer-gate transistor, and a photo diode connected to a source/drain region of the transfer-gate transistor. An electrical fuse is electrically coupled to a gate of the transfer-gate transistor. A diode is electrically coupled to the electrical fuse.

Abstract: A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resistor region. The resistor includes a first dielectric layer, a metal layer, a second dielectric layer, and a semiconductor layer sequentially stacked on the substrate. The first gate structure is disposed on the substrate within the MOS transistor region. The first gate structure includes the first dielectric layer, the metal layer, and the semiconductor layer sequentially stacked on the substrate.

Abstract: A MOS capacitor includes a substrate, a p-type MOS (pMOS) transistor positioned on the substrate, and an n-type MOS (nMOS) transistor positioned on the substrate. More important, the pMOS transistor and the nMOS transistor are electrically connected in parallel. The MOS transistor further includes a deep n-well that encompassing the pMOS transistor and the nMOS transistor.