Patents by Inventor Kai Ma

Kai Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100267248
    Abstract: Methods and apparatus for post treating an oxide layer on a semiconductor substrate are disclosed. In one or more embodiments, the oxide layer is formed by thermal oxidation or plasma oxidation and treated with a plasma comprising helium. The helium-containing plasma may also include hydrogen, neon, argon and combinations thereof. In one or more embodiments, a SiO2 oxide layer is formed on a silicon substrate and treated with a plasma to improve the interface between the silicon substrate and the SiO2 oxide layer.
    Type: Application
    Filed: April 19, 2010
    Publication date: October 21, 2010
    Applicant: Applied Materials, Inc.
    Inventors: Kai Ma, Christopher S. Olsen, Yoshitaka Yokota
  • Publication number: 20090261078
    Abstract: The time between illumination of adjacent zones of a workpiece edge is extended by a long cool-down period or delay, by interlacing a radiation beam scanning pattern. During the cool-down period, the beam successively scans (along the fast axis) two rows separated by about half the wafer diameter, and travels back and then forth (along the slow axis) across the distance between the two rows, while the radiation beam source continuously generates the beam.
    Type: Application
    Filed: September 29, 2008
    Publication date: October 22, 2009
    Applicant: Applied Materials, Inc.
    Inventors: KAI MA, Abhilash J. Mayur, Vijay Parihar
  • Publication number: 20090181553
    Abstract: Embodiments of the invention contemplate a method, apparatus and system that are used to support and position a substrate on a surface that is at a different temperature than the initial, or incoming, substrate temperature. Embodiments of the invention may also include a method of controlling the transfer of heat between a substrate and substrate support positioned in a processing chamber. The apparatus and methods described herein generally may also provide an inexpensive and simple way of accurately positioning a substrate on a substrate support that is positioned in a semiconductor processing chamber. Substrate processing chambers that can benefit from the various embodiments described herein include, but are not limited to RTP, CVD, PVD, ALD, plasma etching, and/or laser annealing chambers.
    Type: Application
    Filed: January 11, 2008
    Publication date: July 16, 2009
    Inventors: Blake Koelmel, Abhilash J. Mayur, Kai Ma, Alexander N. Lerner
  • Patent number: 7429532
    Abstract: A method of processing a thin film structure on a semiconductor substrate using an optically writable mask, the method includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be exposed to a light source in accordance with a predetermined pattern, depositing an optically writable carbon-containing mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, (c) coupling RF plasma bias power or bias voltage to the workpiece.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: September 30, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Patent number: 7422775
    Abstract: A method of processing a workpiece includes introducing an optical absorber material precursor gas into a chamber containing the workpiece, generating an RF oscillating toroidal plasma current in a reentrant path that includes a process zone overlying the workpiece by applying RF source power, so as to deposit a layer of an optical absorber material on the workpiece, and exposing the workpiece to optical radiation that is at least partially absorbed in the optical absorber layer.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: September 9, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Patent number: 7335611
    Abstract: A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: February 26, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Patent number: 7323401
    Abstract: A method of processing a thin film structure on a semiconductor substrate using an optically writable mask includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be etched in accordance with a predetermined pattern, and depositing a carbon-containing hard mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes photolithographically defining the predetermined pattern in the carbon-containing hard mask layer, and etching the target layer in the presence of the hard mask layer.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: January 29, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Patent number: 7312148
    Abstract: A method of forming a barrier layer for a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls and depositing a metal barrier layer comprising the barrier metal on the first barrier layer. The method further includes reflowing the metal barrier layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: December 25, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Patent number: 7312162
    Abstract: A method of depositing a carbon layer on a workpiece includes placing the workpiece in a reactor chamber, introducing a carbon-containing process gas into the chamber, generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and coupling RF plasma bias power or bias voltage to the workpiece.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: December 25, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20070032082
    Abstract: A method of processing a thin film structure on a semiconductor substrate using an optically writable mask, the method includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be exposed to a light source in accordance with a predetermined pattern, depositing an optically writable carbon-containing mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, (c) coupling RF plasma bias power or bias voltage to the workpiece.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 8, 2007
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20070032095
    Abstract: A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 8, 2007
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20070032004
    Abstract: A method of forming a barrier layer for a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls and depositing a metal barrier layer comprising the barrier metal on the first barrier layer. The method further includes reflowing the metal barrier layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 8, 2007
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20070032054
    Abstract: A method of processing a thin film structure on a semiconductor substrate using an optically writable mask includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be etched in accordance with a predetermined pattern, and depositing a carbon-containing hard mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes photolithographically defining the predetermined pattern in the carbon-containing hard mask layer, and etching the target layer in the presence of the hard mask layer.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 8, 2007
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20060263540
    Abstract: A method of processing a workpiece includes introducing an optical absorber material precursor gas into a chamber containing the workpiece, generating an RF oscillating toroidal plasma current in a reentrant path that includes a process zone overlying the workpiece by applying RF source power, so as to deposit a layer of an optical absorber material on the workpiece, and exposing the workpiece to optical radiation that is at least partially absorbed in the optical absorber layer.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 23, 2006
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20060260545
    Abstract: An integrated system for processing a semiconductor wafer includes a toroidal source plasma reactor for depositing a heat absorbing layer, the reactor including a wafer support, a reactor chamber, an external reentrant toroidal conduit coupled to said chamber on generally opposing sides thereof, an RF source power applicator for coupling power to a section of said external reentrant conduit and a process gas source containing a heat absorbing material precursor gas. The integrated system further includes an optical annealing chamber.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 23, 2006
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20060264060
    Abstract: A method of depositing a carbon layer on a workpiece includes placing the workpiece in a reactor chamber, introducing a carbon-containing process gas into the chamber, generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and coupling RF plasma bias power or bias voltage to the workpiece.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 23, 2006
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash Mayur, Amir Al-Bayati, Andrew Nguyen
  • Publication number: 20060240680
    Abstract: A semiconductor wafer processing system including a factory interface operating at atmospheric pressure and mounting plural wafer cassettes and plural wafer processing chambers connected to the factory interface through respective slit valves. A robot in the factory interface can transfer wafers between the cassettes and the processing chambers. At least one of the processing chambers can operate at reduced pressure The processing chamber may be a rapid thermal processing chamber including an array of lamps irradiating a processing volume through a window. The lamphead is vacuum pumped to a pressure approximating that in the processing volume. A multi-step process may be performed with different pressures. The invention also includes a wafer access port of a thermal processing chamber which can flow an inert gas in outside of the slit valve to thereby form a gas curtain outside of the opened slit to prevent the out flow of toxic processing gases.
    Type: Application
    Filed: April 25, 2005
    Publication date: October 26, 2006
    Inventors: Yoshitaka Yokota, Kirk Moritz, Kai Ma, Wen Chang, Anastasios Parasiris, Rohit Sharma, Agus Tjandra, Vedapuram Achutharaman, Sundar Ramamurthy, Randhir Thakur
  • Patent number: 7109098
    Abstract: A method of forming semiconductor junctions in a semiconductor material of a workpiece includes ion implanting dopant impurities in selected regions of the semiconductor material, introducing an optical absorber material precursor gas into a chamber containing the workpiece, generating an RF oscillating toroidal plasma current in a reentrant path that includes a process zone overlying the workpiece by applying RF source power, so as to deposit a layer of an optical absorber material on the workpiece, and optically annealing the workpiece so as to activate dopant impurities in the semiconductor material.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: September 19, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Hiroji Hanawa, Biagio Gallo, Kenneth S. Collins, Kai Ma, Vijay Parihar, Dean Jennings, Abhilash J. Mayur, Amir Al-Bayati, Andrew Nguyen