Patents by Inventor Kai-Wen Cheng

Kai-Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170229532
    Abstract: A semiconductor structure includes a first magnetic layer, an insulative oxide layer, an oxygen trapping layer and a cap layer. The insulative oxide layer is over the first magnetic layer. The oxygen trapping layer is over the insulative oxide layer. The oxygen concentration of the oxygen trapping layer is less than an oxygen concentration of the insulative oxide layer. The cap layer is over the oxygen trapping layer.
    Type: Application
    Filed: February 5, 2016
    Publication date: August 10, 2017
    Inventors: CHUN-CHI CHEN, KAI-WEN CHENG, CHENG-YUAN TSAI, KUO-MING WU
  • Patent number: 9728596
    Abstract: A semiconductor structure includes a first magnetic layer, an insulative oxide layer, an oxygen trapping layer and a cap layer. The insulative oxide layer is over the first magnetic layer. The oxygen trapping layer is over the insulative oxide layer. The oxygen concentration of the oxygen trapping layer is less than an oxygen concentration of the insulative oxide layer. The cap layer is over the oxygen trapping layer.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: August 8, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Chi Chen, Kai-Wen Cheng, Cheng-Yuan Tsai, Kuo-Ming Wu
  • Patent number: 9685389
    Abstract: An embodiment of a memory device is disclosed. The memory device includes a multi-stack dielectric layer over a substrate; a first conductive layer over the multi-stack dielectric layer; a second conductive layer over the first conductive layer; a getter layer over the second conductive layer, wherein the getter layer includes a first layer that is formed of titanium and a second layer overlying the first layer that is formed of tantalum nitride; and an interconnect layer over the getter layer such that the interconnect layer is electrically coupled to the first conductive layer.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: June 20, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao-Wen Chang, Cheng-Yuan Tsai, Kai-Wen Cheng
  • Publication number: 20170162787
    Abstract: The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode layer over a lower metal interconnect layer. A dielectric data storage layer having a variable resistance is formed onto the bottom electrode layer in-situ with forming at least a part of the bottom electrode layer. A top electrode layer is formed over the dielectric data storage layer. By forming the dielectric data storage layer in-situ with forming at least a part of the bottom electrode layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved.
    Type: Application
    Filed: February 15, 2017
    Publication date: June 8, 2017
    Inventors: Trinh Hai Dang, Hsing-Lien Lin, Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai, Ru-Liang Lee
  • Patent number: 9577191
    Abstract: The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode over a lower metal interconnect layer using an atomic layer deposition (ALD) process to form at least a top portion of the bottom electrode. A dielectric data storage layer is formed onto the top portion of the bottom electrode in-situ with forming the top portion of the bottom electrode. A top electrode is formed over the dielectric data storage layer, and an upper metal interconnect layer is formed over the top electrode. By forming the top portion of the bottom electrode using an ALD process that is in-situ with the formation of the overlying dielectric data storage layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: February 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Trinh Hai Dang, Hsing-Lien Lin, Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai, Ru-Liang Lee
  • Patent number: 9525947
    Abstract: The present invention discloses a piezoelectric loudspeaker. The piezoelectric loudspeaker comprises a sound producing plate, a resonant sound-box, a surround and a reflective sound-box. The sound producing plate comprises a piezoelectric ceramic element. The resonant sound-box includes a first opening comprising a first carrying part. The sound producing plate is disposed on the first carrying part. A cavity resonator is formed between the sound producing plate and the resonant sound-box. The surround is disposed between the first carrying part and the sound producing plate. The reflective sound-box includes a second opening and a reflective output opening. The second opening comprises a second carrying part. The resonant sound-box is disposed on the second carrying part. A reflective cavity body is formed between the resonant sound-box and the reflective sound-box, and the reflective cavity body is connected the reflective output opening.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: December 20, 2016
    Assignee: MIEZO INC.
    Inventors: Yuan-Ping Liu, Chang-Heng Tsai, Kai-Wen Cheng, Chung-chun Ho
  • Patent number: 9502493
    Abstract: The present disclosure relates to an integrated chip having a titanium nitride film that provides for a reduced leakage path, and an associated method of formation. In some embodiments, the integrated chip comprises a semiconductor substrate. A titanium nitride film is disposed over the semiconductor substrate. The titanium nitride film comprises a plurality of titanium nitride layers having grain boundaries abutting vertical column-like structures of titanium nitride. The grain boundaries are discontinuous between a top surface of the titanium nitride film and a bottom surface of the titanium nitride film. The discontinuity of the grain boundaries between the different titanium nitride layers reduces leakage paths through the titanium nitride film (e.g., and thereby can improve operation of a MIM capacitor having titanium nitride electrodes).
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: November 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai
  • Patent number: 9343656
    Abstract: Methods and apparatuses for a magnetic tunnel junction (MTJ) which can be used in as a magnetic random access memory cell are disclosed. The MTJ comprises a free layer and an insulator layer. The MTJ further comprises a pinned layer with a first region, a second region, and a third region. The second region is of a first length and of a first thickness, and the first region and the third region are of a second length and of a second thickness. A ratio of the first thickness to the second thickness may be larger than 1.2. A ratio of the second length to the first length is larger than 0.5. The first thickness may be larger than a spin diffusion length of a material for the pinned layer. So formed MTJ results in increased tunneling magnetic resistance ratio and reduced critical switch current of the MTJ.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: May 17, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Wen Cheng, Chwen Yu, Chih-Ming Chen
  • Publication number: 20160056370
    Abstract: The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 25, 2016
    Inventors: Kuo-Ming Wu, Chia-Shiung Tsai, Cheng-Yuan Tsai, Kai-Wen Cheng
  • Patent number: 9203677
    Abstract: A signal processing apparatus for receiving a spectral line of an original signal includes a starting point determining module, a searching module and a symbol rate determining module. The starting point determining module finds a maximum energy in the spectral line and determines at least one search starting point according to the maximum energy. From the at least one search starting point, the searching module searches along the spectral line towards a region with a lower energy for at least one minimum energy satisfying a predetermined condition. The symbol rate determining module determines a symbol rate of the original signal according to the at least one minimum energy.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 1, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chu-Hsin Chang, Kai-Wen Cheng, Yi-Ying Liao, Tung-Sheng Lin, Tai-Lai Tung
  • Patent number: 9201165
    Abstract: A detection circuit is provided. A detection signal corresponding to an equivalent capacitance value of a micro-electro-mechanical system is generated by an oscillator, and the equivalent capacitance value of the micro-electro-mechanical system varies with a location of the micro-electro-mechanical system.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: December 1, 2015
    Assignee: Lite-On Technology Corporation
    Inventors: Yu-Nan Tsai, Kai-Wen Cheng, Chia-Hao Hsu, Chun-Lai Hsiao
  • Patent number: 9178136
    Abstract: The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: November 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Ming Wu, Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai
  • Publication number: 20150287918
    Abstract: The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode over a lower metal interconnect layer using an atomic layer deposition (ALD) process to form at least a top portion of the bottom electrode. A dielectric data storage layer is formed onto the top portion of the bottom electrode in-situ with forming the top portion of the bottom electrode. A top electrode is formed over the dielectric data storage layer, and an upper metal interconnect layer is formed over the top electrode. By forming the top portion of the bottom electrode using an ALD process that is in-situ with the formation of the overlying dielectric data storage layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved.
    Type: Application
    Filed: April 2, 2014
    Publication date: October 8, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Trinh Hai Dang, Hsing-Lien Lin, Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai, Ru-Liang Lee
  • Patent number: 9131198
    Abstract: A signal processing apparatus includes an initial detecting module, a mixer, a symbol rate detecting module, a judging module and a correcting module. The initial detecting module determines an initial carrier frequency offset of an input signal according to a spectrum of the input signal. The mixer adjusts the input signal according to the initial carrier frequency offset to generate a frequency-compensated signal. The symbol rate detecting module determines a symbol rate of the input signal. The judging module judges whether the initial carrier frequency offset is correct according to the frequency-compensated signal. When a judgment result of the judging module is negative, the correcting module determines a corrected carrier frequency offset according to the symbol rate and the spectrum.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: September 8, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chu-Hsin Chang, Kai-Wen Cheng, Yi-Ying Liao, Tung-Sheng Lin, Tai-Lai Tung
  • Publication number: 20150243730
    Abstract: The present disclosure relates to an integrated chip having a titanium nitride film that provides for a reduced leakage path, and an associated method of formation. In some embodiments, the integrated chip comprises a semiconductor substrate. A titanium nitride film is disposed over the semiconductor substrate. The titanium nitride film comprises a plurality of titanium nitride layers having grain boundaries abutting vertical column-like structures of titanium nitride. The grain boundaries are discontinuous between a top surface of the titanium nitride film and a bottom surface of the titanium nitride film. The discontinuity of the grain boundaries between the different titanium nitride layers reduces leakage paths through the titanium nitride film (e.g., and thereby can improve operation of a MIM capacitor having titanium nitride electrodes).
    Type: Application
    Filed: February 26, 2014
    Publication date: August 27, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Wen Cheng, Cheng-Yuan Tsai, Chia-Shiung Tsai
  • Publication number: 20150092963
    Abstract: The present invention discloses a piezoelectric loudspeaker. The piezoelectric loudspeaker comprises a sound producing plate, a resonant sound-box, a surround and a reflective sound-box. The sound producing plate comprises a piezoelectric ceramic element. The resonant sound-box includes a first opening comprising a first carrying part. The sound producing plate is disposed on the first carrying part. A cavity resonator is formed between the sound producing plate and the resonant sound-box. The surround is disposed between the first carrying part and the sound producing plate. The reflective sound-box includes a second opening and a reflective output opening. The second opening comprises a second carrying part. The resonant sound-box is disposed on the second carrying part. A reflective cavity body is formed between the resonant sound-box and the reflective sound-box, and the reflective cavity body is connected the reflective output opening.
    Type: Application
    Filed: January 27, 2014
    Publication date: April 2, 2015
    Applicant: Miezo Inc.
    Inventors: Yuan-Ping LIU, Chang-Heng TSAI, Kai-Wen CHENG, Chung-chun HO
  • Publication number: 20150042365
    Abstract: A detection circuit is provided. A detection signal corresponding to an equivalent capacitance value of a micro-electro-mechanical system is generated by an oscillator, and the equivalent capacitance value of the micro-electro-mechanical system varies with a location of the micro-electro-mechanical system.
    Type: Application
    Filed: October 3, 2013
    Publication date: February 12, 2015
    Applicant: LITE-ON IT CORPORATION
    Inventors: Yu-Nan Tsai, Kai-Wen Cheng, Chia-Hao Hsu, Chun-Lai Hsiao
  • Patent number: 8931026
    Abstract: An apparatus for detecting spectrum inversion includes a different correlator and a determining module. The differential correlator performs an odd-order differential correlation on an input signal and a known signal to generate a differential correlation result. When the input signal is determined as corresponding to a target signal of the known signal, the determining module detects spectrum inversion in the input signal according to the phase of the differential correlation result.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: January 6, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Kai-Wen Cheng, Yi-Ying Liao, Tung-Sheng Lin, Tai-Lai Tung
  • Patent number: 8931017
    Abstract: A channel scanning method for Digital Video Broadcasting-Satellite (DVB-S) signals is provided. The method includes: scanning a radio frequency (RF) signal according to a normal frequency step; when the Nth channel is detected, obtaining a difference between a low boundary of an Nth channel and a high boundary of an (N?1)th channel; and, when the difference is within a predetermined bandwidth range, scanning the RF signal between the high boundary of the (N?1)th channel and the low boundary of the Nth channel according to a narrow frequency step. The normal frequency step is greater than the narrow frequency step.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: January 6, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chu-Hsin Chang, Kai-Wen Cheng, Yi-Ying Liao, Tung-Sheng Lin, Tai-Lai Tung
  • Patent number: 8905553
    Abstract: A method of detecting a scanning angle range of a laser beam of a laser projector is provided. First, a photo sensor is disposed between first and second positions on a projection mirror. Then, a laser beam emitted from the laser projector scans back and forth between the first and second positions, so that the photo sensor receives the laser beam sequentially at first and second scanning time points to generate first and second sensing signals, respectively. If an actual time interval between the first and second sensing signals conforms to an expected time interval, an actual scanning angle range of the laser beam is determined as normal. If the actual time interval does not conform to the expected time interval, the actual scanning angle range of the laser beam is determined as abnormal and the laser projector stops emitting the laser beam. A laser projector is also provided.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: December 9, 2014
    Assignee: Lite-On Technology Corporation
    Inventors: Chia-Tse Lin, Kai-Wen Cheng