Abstract: Embodiments of the present disclosure provide a method including forming a gate electrode over a substrate, forming a ferroelectric layer over the gate electrode, forming a channel layer over the ferroelectric layer, forming a capping layer over the channel layer, wherein the capping layer includes one or more of CeOx, BeOx, InOx, GaOx, AlOx, SnOx, VOx, WOx, TiOx, ZrOx, NbOx, HfOx, SiOx, TaOx, a binary metal oxide based on any combination of the preceding metal oxides, or a ternary metal oxide based on any combination of the preceding metal oxides, annealing, after forming the capping layer, at a temperature less than 350° C., forming a dielectric layer over the capping layer, and forming a source contact and a drain contact in the dielectric layer.

Abstract: A method for forming a semiconductor device is provided.

Abstract: Aspects of the present disclosure include polymeric structures (e.g., microneedles) having a lattice microstructure composed of one or more lattice cell units. Polymeric structures according to certain embodiments have repeating lattice cell units that are formed by high resolution continuous liquid interface production. Aspects also include systems for making polymeric structures having a lattice microstructure. Systems according to certain embodiments include a micro-digital light projection system having a light beam generator component and a light projection monitoring component and a liquid interface polymerization module having a build elevator and a build surface configured for generating the polymeric lattice microstructure from a polymerizable composition positioned therebetween. Methods for making polymeric structures having a lattice microstructure with the subject systems are also provided.

Abstract: A semiconductor device comprises a first conductive feature on a semiconductor substrate, a bottom electrode on the first conductive feature, a magnetic tunnel junction (MTJ) stack on the bottom electrode, and a top electrode on the MTJ stack. A spacer contacts a sidewall of the top electrode, a sidewall of the MTJ stack, and a sidewall of the bottom electrode. A conductive feature contacts the top electrode.

Abstract: Aspects described herein may relate to methods, systems, and apparatuses that determine one or more categories associated with a dataset, or a portion thereof. The determination may be performed based on one or more tags associated with the dataset and/or a description associated with the dataset. Further, the determination may be performed by searching an ontology based on the one or more tags and/or the description. The determination may be performed by using a machine-learning model based on the one or more tags and/or the description. Once the one or more categories associated with the dataset are determined, the one or more categories may be used as a basis for modifying the dataset and/or validating the dataset.

Abstract: A slide rail assembly includes a first rail, a second rail, a releasing member, a blocking member and an operating member. A first positioning structure, an assisting structure and a second positioning structure are arranged on the first rail. The assisting structure is located between the first positioning structure and the second positioning structure. The second rail is displaceable relative to the first rail and can be positioned at different positions by a blocking of at least one of the releasing member and the blocking member and one of the first positioning structure, the assisting structure and the second positioning structure. The operating member is configured to operate the releasing member and the blocking member for terminating the blocking of the at least one of the releasing member and the blocking member and the one of the first positioning structure, the assisting structure and the second positioning structure.

Abstract: An adaptive image shading correction method and an adaptive image shading system are provided. The method includes: configuring an image capturing device to obtain a current frame; and configuring a processing unit to: divide the current frame into blocks; select block pairs from the blocks, in which each of the block pairs includes an inner block and an outer block; perform a filtering process for each of the block pairs to determine whether a brightness condition, a saturation condition, a hue similarity condition, and a sharpness similarity condition are met; in response to obtaining filtered block pairs, calculate a sum similarity threshold based on hue statistical data, a saturation difference, and a brightness difference; and use filtered blocks with individual thresholds less than the sum similarity threshold to calculate a shadow compensation value to adjust the current frame.

Abstract: Provided are compositions and methods that include binding partners that bind with specificity to target sites on proteins or peptides that comprise a covalently attached molecule. The binding partners are provided as antibodies and antibody derivatives that specifically bind to proteins and peptides that have been covalently modified by attachment of a molecule, such as a drug. The binding partners can bind with specificity to covalently modified peptides when presented in the context of a major histocompatibility complex (MHC). Uses of the compositions and methods for prophylaxis or therapy of disorders are also provided.

Abstract: A driving circuit and a synchronization method thereof for a multi-panel display device are provided. The driving circuit includes a first driving chip and a second driving chip which share a power circuit. One of the first driving chip and the second driving chip is set as a master driving chip or a slave driving chip based on a control signal. The master driving chip transmits a power enable signal and a control signal to the power circuit, which triggers the power circuit providing power voltages to the master driving chip and the slave driving chip. When the master driving chip transmits a timing control signal to the slave driving chip, the slave driving chip performs a power synchronization operation to synchronize with the master driving chip based on the timing control signal.

Abstract: A crank apparatus equipped with a labor-saving mechanism and a bicycle crank assembly are disclosed. The crank apparatus includes a crank mechanism, a transmission mechanism, a supporting module and a rotating arm module. The crank mechanism includes a crank, an axle-end gear and a pedal-end gear. The transmission mechanism includes a rotating axle having a circular groove. The supporting module is adapted to sheathe the rotating axle and includes an outer ring and rollers received inside the circular grooves and clamped between the rotating axle and the outer ring. The rotating arm module includes a first rotating arm and a second rotating arm. One end of the second rotating arm is connected to the first rotating arm, and another end of the second rotating arm is connected to the pedal-end gear. Accordingly, the transmission stability and useful lifetime of the crank apparatus and bicycle crank assembly are increased.

Abstract: A data communication method includes: processing to-be-transmitted target secret information by using a preset secret sharing algorithm to obtain a plurality of secret fragments; and distributing the plurality of secret fragments to each relay node in a first relay node layer among preset M relay node layers to transmit the plurality of secret fragments to a receiving device by means of each relay node in the M relay node layers, so that the receiving device can obtain the target secret information based on each received secret fragment under the condition that the number of the received secret fragments is greater than or equal to a preset security threshold. By applying the data communication method, in the case that the number of breached relay nodes does not exceed the preset security threshold, an attacker cannot obtain a sufficient number of secret fragments to crack the target secret information.

Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.

Abstract: A semiconductor device comprises a first conductive feature on a semiconductor substrate, a bottom electrode on the first conductive feature, a magnetic tunnel junction (MTJ) stack on the bottom electrode, and a top electrode on the MTJ stack. A spacer contacts a sidewall of the top electrode, a sidewall of the MTJ stack, and a sidewall of the bottom electrode. A conductive feature contacts the top electrode.

Abstract: A coherent Ising machine based on on-chip whispering gallery mode optical microcavity mainly adopts an optical microcavity integrated with a second laser processing apparatus (a nonlinear crystal), so as to archive an on-chip structure, which, compared with the fiber loop structure in the prior art, has the integration level optimized significantly.

Abstract: A method for signal optimization between a user equipment and a reconfigurable intelligence surface includes a phase optimization step having: generating at least one modified phase combination in the state that a performance index of a current phase combination is smaller than a preset performance threshold value; evaluating whether a corresponding performance index of the modified phase combination is not smaller than the preset performance threshold value or evaluating whether the performance index of the modified phase combination is larger than the corresponding performance index of the current phase combination, to determine an optimized phase combination, enabling a corresponding performance index to be not smaller than the preset performance threshold value or not smaller than the performance index of any modified phase combination in the phase optimization step; and replacing the current phase combination by the optimized phase combination to form an updated current phase combination.

Abstract: A solution for preserving extracellular vesicles/exosomes has a carrier solvent selected from a group consisting of polysorbate 80, sucrose, and polyethylene glycol 3350/4000; and a stabilizer selected from a group consisting of salts, amino acids, and amino acid salts; wherein the pH of the preservation solution ranges from 5 to 7.4.

Abstract: Aspects described herein may relate to methods, systems, and apparatuses that determine one or more categories associated with a dataset, or a portion thereof. The determination may be performed based on one or more tags associated with the dataset and/or a description associated with the dataset. Further, the determination may be performed by searching an ontology based on the one or more tags and/or the description. The determination may be performed by using a machine-learning model based on the one or more tags and/or the description. Once the one or more categories associated with the dataset are determined, the one or more categories may be used as a basis for modifying the dataset and/or validating the dataset.

Abstract: Provided are proteins or peptides, which may be referred to as monobodies. Fusion proteins and proteolysis targeting chimeras (PROTACs) comprising the proteins or peptides are also provided. Also provided are compositions of the proteins or peptides of the present disclosure, as well as compositions of fusion proteins and compositions of PROTACs. Methods of treating an individual in need of treatment are also provided. The methods may be to treat an individual suffering from or suspected of having KRAS(G12V), KRAS(G12S), KRAS(G12A) and/or KRAS(G12C)-associated cancers. A method may be for inhibiting ERK activation and/or proliferation of KRAS(G12V), KRAS(G12S), KRAS(G12A) and/or KRAS(G12C)-associated cancers.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate electrode, a gate insulating layer, an active layer, a dielectric layer, a source electrode, and a drain electrode. The gate insulating layer is disposed between the gate electrode and the active layer, the dielectric layer is disposed on a side of the active layer, and the source electrode and the drain electrode pass through the dielectric layer to electrically connect with the active layer, wherein a first contact surface is formed between the source electrode and the active layer, a second contact surface is formed between the drain electrode and the active layer, the first contact surface and the second contact surface are subjected to a plasma treatment or a deposition treatment to form a protective interface layer.

Abstract: A semiconductor device includes a gate electrode, a gate dielectric located over the gate electrode, a channel layer including a semiconductor material and located over the gate dielectric, blocking layers located over the channel layer, covering portions of channel layer, and spaced apart from each other, buffer layers respectively located over the blocking layers, respectively surrounded by the blocking layers, and including a material that receives hydrogen, and source/drain contacts respectively located over the buffer layers and respectively surrounded by the buffer layers.