Abstract: A process for fabricating a vertical spiral inductor within a multichip module package is disclosed. The process consists of depositing a pattern of bottom lines by electroplating copper on a substrate and then depositing an insulation pattern. Next, depositing a pattern of permeable material to form a core and then depositing polyimide to define vias and permeable core insulation. The vias are filled by electroplating copper. The vertical spiral inductor is formed and defined by next depositing a pattern of top metal (e.g. copper) lines by electroplating wherein the top metal lines are staggered with respect to the bottom metal lines. Lastly a top protective layer is deposited. The core is made from a permeable or non-permeable material.

Abstract: An acoustic ink printing print head utilizing metal alloy 42 is disclosed. Additionally, a process for incorporating the metal alloy 42 (alloy with approximately 42% nickel and 58% iron) to build the liquid level control/aperture plate defining an AIP print head is disclosed. The process consists of fabricating a channel plate and an aperture plate from the metal alloy 42 and bonding the two structures together thereby defining the liquid level control/aperture plate.

Abstract: The invention is directed to a fabrication method of copper interconnects using dual damascene processing. Using silicon to provide an active surface, palladium can be selectively deposited on silicon by an immersion plating technique. After palladium deposition (about 1000 Å thick), either a layer of cobalt phosphorus or alloy cobalt/nickel phosphorus or nickel phosphorus is deposited on the palladium layer using an electroless plating technique. This cobalt phosphorus, cobalt/nickel phosphorus alloy, or nickel phosphorus layer serves as a copper diffusion barrier. The via and trenches are filled with copper by an electroless copper plating method and CMP is used to remove the excess copper and planarize-/-polish the copper/dielectric surface.

Abstract: A method for estimation of toner usage in digital xerographic process is disclosed. The method calculates a ratio of transition count/pixel count using a pixel transition count and a pixel count for a printed image and provides an estimate of toner consumption based on the ratio of transition count/pixel count.

Abstract: A process for fabricating a vertical spiral inductor within a multichip module package is disclosed. The process consists of depositing a pattern of bottom lines by electroplating copper on a substrate and then depositing an insulation pattern. Next, depositing a pattern of permeable material to form a core and then depositing polyimide to define vias and permeable core insulation. The vias are filled by electroplating cooper. The vertical spiral inductor is formed defined by next depositing a pattern of top metal (e.g. Copper) lines by electroplating wherein the top metal lines are staggered with respect to the bottom metal lines. Lastly a top protective layer is deposited. The core made be made from a preamble or non-premable material.

Abstract: The invention is directed to a fabrication method of copper interconnects using dual damascene processing. Using silicon to provide an active surface, palladium can be selectively deposited on silicon by immersion plating technique. After palladium deposition (about 1000 A thick), either a layer of cobalt phosphorus or alloy cobalt/nickel phosphorus or nickel phosphorus is deposited on palladium layer using electroless plating technique. This cobalt/phosphorus, cobalt nickel phosphorus alloy, or nickel phosphorus layer serves as a copper diffusion barrier. Via and trench are filled up by copper from electroless copper plating method and CMP is used to remove excess copper and planarize/polish the copper/dielectric surface.

Abstract: A method of fabrication of copper interconnect by means of copper electroplating is disclosed. In the conventional method of fabricating copper interconnect for integrated circuits, critical steps such as deposition of copper seed layer and chemical mechanical polishing (CMP) are required. However in this invention, both the seed layer deposition and CMP are not required.

Abstract: An acoustic ink printing print head utilizing metal alloy 42 is disclosed. Additionally, a process for incorporating the metal alloy 42 (alloy with approximately 42% nickel and 58% iron) to build the liquid level control/aperture plate defining an AIP print head is disclosed. The process consists of fabricating a channel plate and an aperture plate from the metal alloy 42 and bonding the two structures together thereby defining the liquid level control/aperture plate.

Abstract: Low acoustic solid wave attenuation structures are formed with an electroformed nickel mold, and are incorporated within acoustic ink emitters, between the focusing lens and surface of an ink layer. The structures have characteristics of low attenuation of acoustic waves to increase the efficiency of acoustic wave transmission within the acoustic ink emitter. Using the described structures, acoustic ink printers can accurately emit materials having high viscosity, including hot melt inks.

Abstract: A device for the transport and/or metering of marking material includes a plurality of phased electrodes, for example formed on a substrate. An electrostatic traveling wave may be generated along the electrodes to sequentially attract particles of marking material, and thereby transport them to a desired location. The electrodes may be formed in a planar structure. A matrix interconnection scheme allows for reduced lead count.

Abstract: Low acoustic solid wave attenuation structures are formed with an electroformed nickel mold, and are incorporated within acoustic ink emitters, between the focusing lens and surface of an ink layer. The structures have characteristics of low attenuation of acoustic waves to increase the efficiency of acoustic wave transmission within the acoustic ink emitter. Using the described structures, acoustic ink printers can accurately emit materials having high viscosity, including hot melt inks.

Abstract: Low acoustic solid wave attenuation structures are formed with an electroformed nickel mold, and are incorporated within acoustic ink emitters, between the focusing lens and surface of an ink layer. The structures have characteristics of low attenuation of acoustic waves to increase the efficiency of acoustic wave transmission within the acoustic ink emitter. Using the described structures, acoustic ink printers can accurately emit materials having high viscosity, including hot melt inks.

Abstract: In a ballistic aerosol marking device or the like, marking material flows from a material reservoir to a delivery channel via a port. Flow of marking material is facilitated by the provision of electrostatic marking material moving structures in or near the walls of the marking material reservoir. Marking material may be set into a continuous motion past the port and controllably extracted from the reservoir into the channel.

Abstract: A ballistic aerosol marking device includes, marking material which flows from a material reservoir to a delivery channel via a port. Flow of marking material is facilitated by the creation of a fluidized bed or aerosol of marking material in the reservoir. Gas flow together with mechanical or electromechanical assistance can be used to assist in the generation of the fluidized bed or aerosol.

Abstract: A device for the transport of particulate marking material includes a plurality of interdigitated electrodes formed on a substrate. An electrostatic traveling wave may be generated across the electrodes to sequentially attract particles of marking material, and thereby transport them to a desired location. The electrodes may be integrally formed with driving circuitry, and may be staggered to minimize or eliminate cross-talk.

Abstract: An inorganic, top-surface, semiconducting dielectric overcoat, having a selected time constant permits electric field charge and dissipation at a selected rate to facilitate particulate material movement over an underlying electrode grid. The coating may be made from nitrides, oxides or oxy-nitrides of silicon, or amorphous silicon. A planarized, wear resistant, chemically stable surface, and minimized inter-electrode build-up are also provided by the overcoat.

Abstract: An organic, top-surface, semiconducting dielectric overcoat, having a selected time constant permits electric field charge and dissipation at a selected rate to facilitate particulate material movement over an underlying electrode grid. The coating may be made from a compound including bisphenol A polycarbonate, or similar material, and a charge transport molecule (e.g. m-TBD). A planarized, wear resistant, chemically stable surface, with minimized inter-electrode build-up are also provided by the overcoat.

Abstract: An apparatus for developing a latent image recorded on an imaging surface, including a housing defining a chamber for storing a supply of developer material including toner; a dispensing system for dispensing toner of a first color and toner of a second color into said housing; an air system for fuildizing and mixing toner of said first color and toner of said second color; a donor member, spaced from the imaging surface, for transporting toner on the surface thereof to a region opposed from the imaging surface, said donor member includes an electrode array on the outer surface thereof, said array including a plurality of spaced apart electrodes extending substantial across width of the surface of the donor member; and a multi-phase voltage source operatively coupled to said electrode array, the phase being shifted with respect to each other such as to create an electrodynamic wave pattern for moving toner particles to and from a development zone.

Abstract: A multi-layer organic, top-surface, semiconducting dielectric overcoat, having a selected time constant permits electric field charge and dissipation at a selected rate to facilitate particulate material movement over an underlying electrode grid. The coating may be made from a first layer including an oxidant, and a second layer thereover which omits said oxidant. Each layer may further include a compound including a polymer such as bisphenol A polycarbonate, and a charge transport molecule such as m-TBD. A planarized, wear resistant, chemically stable surface, with minimized inter-electrode build-up are also provided by the overcoat.

Abstract: A method of creating a plurality of fine pitch integrated interconnects utilizes a flexible layer to create a plurality of integrated interconnects which extend beyond the boundary of the integrated circuit chip onto the substrate. Subsequently, a support layer is deposited on the interconnects and the substrate under the plurality of interconnects which is located beyond the boundary of the integrated circuit chip is removed.