Patents by Inventor Kamel Abouda

Kamel Abouda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8847630
    Abstract: A driver circuit is provided that receives an ON or OFF logic control signal and further has: an output arranged to be connected to a load; a power switch, having a control terminal with a first current terminal connected to a first power supply and a second current terminal arranged to be connected to the output to drive the load; a control circuit of a first type arranged between the control terminal of the power switch and a second power supply; and a control circuit of a second type, arranged to couple the control terminal of the power switch to the first power supply when the control signal is in the OFF state.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: September 30, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mohammed Mansri, Kamel Abouda, Ahmed Hamada
  • Publication number: 20140084940
    Abstract: A method of and apparatus for fault detection utilizing a diagnostic procedure by a diagnostic device to detect a short circuit between at least two of a plurality of load electrical connections, the diagnostic procedure comprising applying a test electrical signal to each of the load electrical connections in turn and whilst applying the test electrical signal to a first one of the load electrical connections, detecting whether an electrical output is present, in response, on any other of the load electrical connections, wherein the detecting by the diagnostic device includes applying the test electrical signal to the first one of the load electrical connections in an operational mode of the apparatus when an electrically controlled switch connected to the first one of the load electrical connections is in an off state.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 27, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kamel ABOUDA, Stephanie CREVEAU-BOURY, Murielle DELAGE, Pierre TURPIN
  • Patent number: 8598886
    Abstract: Apparatus for detecting faults in the delivery of electrical power to electrical loads, includes a plurality of load electrical connections arranged to deliver electrical power from an electrical power source to each of a plurality of electrical loads, a plurality of electrical switches, each connected to an associated one of the load connections, and a diagnostic device operable to detect a short circuit fault in the apparatus, wherein the diagnostic device is operable to apply a diagnostic procedure to detect a short circuit connection between at least two of the load electrical connections and includes a control logic unit operable to apply to each of the electrical switches in turn a test control signal causing operation of the switch to apply a test electrical signal to each of the load electrical connections in turn; and detector means connected to the load electrical connections and operable, while the test electrical signal is applied in turn to each load electrical connection, to detect whether a cor
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: December 3, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kamel Abouda, Stephanie Creveau-Boury, Murielle Delage, Pierre Turpin
  • Patent number: 8461780
    Abstract: A method is intended to make it possible to drive a PTC electrical load element with a switching unit with the highest possible operational reliability. For this purpose, the electric current is switched off if a predetermined current threshold value is exceeded, the magnitude of the current threshold value being determined from the operating parameters of the load element.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: June 11, 2013
    Assignees: Freescale Semiconductor, Inc., Conti Temic Microelectronic GmbH
    Inventors: Laurent Guillot, Kamel Abouda, Philippe Rosado, Helmut Henssler, Uli Joos, Josef Schnell, Norbert Stuhler
  • Publication number: 20130106467
    Abstract: A driver circuit is provided that receives an ON or OFF logic control signal and further has: an output arranged to be connected to a load; a power switch, having a control terminal with a first current terminal connected to a first power supply and a second current terminal arranged to be connected to the output to drive the load; a control circuit of a first type arranged between the control terminal of the power switch and a second power supply; and a control circuit of a second type, arranged to couple the control terminal of the power switch to the first power supply when the control signal is in the OFF state.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Inventors: Mohammed Mansri, Kamel Abouda, Ahmed Hamada
  • Patent number: 8384313
    Abstract: A circuit for improving the control of a change in state of a signal in an electronic device between a first state and a second state, wherein a first change in state occurs when the state changes from the second state to the first state and a second change in state occurs when the state changes from the first state to the second state and wherein the first and second changes in state have associated therewith a first and a second time delay over which each change in state occurs, characterized in that said circuit comprises a determining unit for measuring the first time delay and a calculator for calculating a common delay to replace one or more of the first and second delays to thereby improve the control of the change in state of the signal.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: February 26, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kamel Abouda, Murielle Delage, Erwan Hemon, Pierre Turpin
  • Publication number: 20120119678
    Abstract: A method is intended to make it possible to drive a PTC electrical load element with a switching unit with the highest possible operational reliability. For this purpose, the electric current is switched off if a predetermined current threshold value is exceeded, the magnitude of the current threshold value being determined from the operating parameters of the load element.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Applicants: CONTI TEMIC MICROELECTRONIC GMBH, FREESCALE SEMICONDUCTOR, INC.
    Inventors: Laurent Guillot, Kamel Abouda, Philippe Rosado, Helmut Henssler, Uli Joos, Josef Schnell, Norbert Stuhler
  • Patent number: 8134308
    Abstract: A method is intended to make it possible to drive a PTC electrical load element with a switching unit with the highest possible operational reliability. For this purpose, the electric current is switched off if a predetermined current threshold value is exceeded, the magnitude of the current threshold value being determined from the operating parameters of the load element.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: March 13, 2012
    Assignees: Freescale Semiconductor, Inc., Conti Temic Microelectronic GmbH
    Inventors: Laurent Guillot, Kamel Abouda, Philippe Rosado, Helmut Henssler, Uli Joos, Josef Schnell, Norbert Stuhler
  • Patent number: 7936200
    Abstract: A clock circuit which may include a first clock input for receiving a first clock signal and a second clock input for receiving a second clock signal. A clock calibration unit is connected to the first clock input and the second clock input. The calibration unit may calibrate the second clock signal relative to the first clock signal. The clock calibration unit may have a calibration output for outputting a calibrated clock signal. The clock circuit may include a switch unit connected to the first clock input and the calibration output. The switch unit can select a selected clock signal selected from the first clock signal and the calibrated signal. The switch unit has a switch output for outputting the selected clock signal. A switch control unit is connected to the switch unit for controlling which signal is selected based on a selection criterion and a clock circuit output is connected to the switch unit for outputting the selected clock signal.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: May 3, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kamel Abouda, Laurent Guillot
  • Patent number: 7924061
    Abstract: A clock failure detection circuit comprises clock failure detection logic having a clock input providing an input clock signal, a counter and a reference clock input providing a reference clock signal to the counter for counting a number of reference clock cycles. The counter comprises a reset input arranged to receive successive reset pulses generated by at least one clock edge of the input clock signal to reset a counter value of the counter. The counter value before reset is used to identify a clock frequency error. A method of detecting a clock failure is also described. By using a counter value based on the reference clock cycles, and a reset trigger based on a clock edge of the input signal, it is possible to identify a clock frequency error in a much shorter time.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: April 12, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Laurent Guillot, Kamel Abouda, Pierre Turpin
  • Publication number: 20110001486
    Abstract: Apparatus for detecting faults in the delivery of electrical power to electrical loads, includes a plurality of load electrical connections arranged to deliver electrical power from an electrical power source to each of a plurality of electrical loads, a plurality of electrical switches, each connected to an associated one of the load connections, and a diagnostic device operable to detect a short circuit fault in the apparatus, wherein the diagnostic device is operable to apply a diagnostic procedure to detect a short circuit connection between at least two of the load electrical connections and includes a control logic unit operable to apply to each of the electrical switches in turn a test control signal causing operation of the switch to apply a test electrical signal to each of the load electrical connections in turn; and detector means connected to the load electrical connections and operable, whilst the test electrical signal is applied in turn to each load electrical connection, to detect whether a co
    Type: Application
    Filed: March 20, 2008
    Publication date: January 6, 2011
    Inventors: Kamel Abouda, Stephanie Creveau-Boury, Murielle Delage, Pierre Turpin
  • Publication number: 20100244714
    Abstract: A circuit for improving the control of a change in state of a signal in an electronic device between a first state and a second state, wherein a first change in state occurs when the state changes from the second state to the first state and a second change in state occurs when the state changes from the first state to the second state and wherein the first and second changes in state have associated therewith a first and a second time delay over which the or each change in state occurs, characterized in that said circuit comprises a determining unit for measuring the first time delay and a calculator for calculating a common delay to replace one or more of the first and second delays to thereby improve the control of the change in state of the signal
    Type: Application
    Filed: November 13, 2007
    Publication date: September 30, 2010
    Applicant: Freeescale Semiconductor IN.c
    Inventors: Kamel Abouda, Murielle Delage, Erwan Hemon, Pierre Turpin
  • Publication number: 20100244902
    Abstract: A clock circuit which may include a first clock input for receiving a first clock signal and a second clock input for receiving a second clock signal. A clock calibration unit is connected to the first clock input and the second clock input. The calibration unit may calibrate the second clock signal relative to the first clock signal. The clock calibration unit may have a calibration output for outputting a calibrated clock signal. The clock circuit may include a switch unit connected to the first clock input and the calibration output. The switch unit can select a selected clock signal selected from the first clock signal and the calibrated signal. The switch unit has a switch output for outputting the selected clock signal. A switch control unit is connected to the switch unit for controlling which signal is selected based on a selection criterion and a clock circuit output is connected to the switch unit for outputting the selected clock signal.
    Type: Application
    Filed: January 8, 2007
    Publication date: September 30, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kamel Abouda, Laurent Guillot
  • Publication number: 20100171528
    Abstract: A clock failure detection circuit comprises clock failure detection logic having a clock input providing an input clock signal, a counter and a reference clock input providing a reference clock signal to the counter for counting a number of reference clock cycles. The counter comprises a reset input arranged to receive successive reset pulses generated by at least one clock edge of the input clock signal to reset a counter value of the counter. The counter value before reset is used to identify a clock frequency error. A method of detecting a clock failure is also described. By using a counter value based on the reference clock cycles, and a reset trigger based on a clock edge of the input signal, it is possible to identify a clock frequency error in a much shorter time.
    Type: Application
    Filed: March 27, 2006
    Publication date: July 8, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Laurent Guillot, Kamel Abouda, Pierre Turpin
  • Publication number: 20090102400
    Abstract: A method is intended to make it possible to drive a PTC electrical load element with a switching unit with the highest possible operational reliability. For this purpose, the electric current is switched off if a predetermined current threshold value is exceeded, the magnitude of the current threshold value being determined from the operating parameters of the load element.
    Type: Application
    Filed: April 16, 2007
    Publication date: April 23, 2009
    Applicant: Freescale Semiconductor Inc.
    Inventors: Laurent Guillot, Kamel Abouda, Philippe Rosado, Helmut Henssler, Uli Joos, Josef Schnell, Norbert Stuhler