Abstract: A folded line DRAM having shared sense amplifiers wherein one of two the memory cell arrays is provided with a pair of switches for dividing the bit line pairs into plural bit line pair groups and the second memory cell array is provided with separate switches connected in series the bit line pairs for the purpose of reducing power consumption caused by charging and discharging of the bit lines during accessing.

Abstract: In an image pickup device comprising photodetectors (1), vertical transfer portions (2), transfer gate areas (3) each provided between one of the photodetectors (1) and the corresponding one of the vertical transfer portions (2), a storage portion (7), a horizontal transfer portion (5) and an output portion (6), the whole of which are formed on a semiconductor substrate, wherein signal charges obtained in the photodetectors (1) during a light receiving period are read out through the transfer gate areas (3) to the vertical transfer portions (2) during a reading out period, then transferred from the vertical transfer portions (2) to the storage portion (7) at high speed and further transferred through the horizontal transfer portion (5) to the output portion (6); the transfer gate areas (3) are of high impurity density, and each of the vertical transfer portions (2) is surrounded by a region (13) of high impurity density including the transfer gate areas.

Abstract: In a solid state image pickup apparatus employing a solid state image pickup device of the interline transfer type which comprises a plurality of photodetectors (1) arranged horizontally and vertically, transfer gate areas (6) each corresponding to each of the photodetectors (1), vertical transfer portions (2), a horizontal transfer portion (4) and an output portion (5), a reading pulse voltage taking a first high level (V.sub.R) is applied to each of two of the transfer gate areas (6) adjacent in the vertical direction alternately at every field period, so that signal charges are read out to the vertical transfer portions (2) from the photodetectors (1) corresponding to the transfer gate areas (6) to which the reading pulse voltage is applied, a voltage taking a second high level (V.sub.H) lower than the first high level (V.sub.R) is applied to the storage regions of the vertical transfer portions (2) during each horizontal video period, transfer pulse voltages taking the low level (V.sub.

Abstract: In a solid state image pickup apparatus comprising a solid state image pickup device having photodetectors (1), transfer gate areas (6) and vertical transfer portions (2), and being formed such that the photodetectors (1) and the vertical transfer portions (2) are not covered with a light shielding layer (11), and a shutter mechanism provided to the solid state image pickup device; the shutter mechanism is made open and the relationship of P.sub.r .ltoreq.P.sub.t <P.sub.s, where P.sub.s, P.sub.t and P.sub.r are the potentials of the photodetector (1) the transfer gate area (6) and the vertical transfer portion (2), respectively, is held during a light receiving period, the shutter mechanism is shut and the relationship of P.sub.s .ltoreq.P.sub.t <P.sub.r is held during a reading out period, and the shutter mechanism is shut and the relationship of P.sub.t <P.sub.s and P.sub.t <P.sub.

Abstract: A solid state image sensor of the interline transfer type comprises a sensing and vertical transfer portion, a horizontal charge transfer portion and an output portion, having a large number of sensing element regions, each of which contains a photo-sensing area, a vertical charge transfer portion and a channel stopper area with substantially the same impurity concentration provided in areas surrounding the photo-sensing area and forming a transfer gate area are provided in the sensing and vertical transfer portions, and the arrangement of first and second transfer electrodes are provided for the sensing element regions such that the second transfer electrode is located completely on the first transfer electrode in the area of a part of the channel stopper region between two adjacent photo-sensing areas so that it is shielded from a part of the channel stopper region by the first transfer electrode so that the charge transfer efficiency in the vertical charge transfer portion is substantially improved.

Abstract: A solid state image sensor of the interline transfer type comprises a sensing and vertical transfer portion formed on a semiconductor substrate of a first conductive type, for example, P - type, a horizontal charge transfer portion and an output portion, wherein a semiconductor layer of a second conductive type, for example, N - type with the low impurity density is provided on the semiconductor substrate and a plurality of P - type semiconductor regions with the high impurity density, each of which contains a vertical charge transfer portion for vertically transferring a signal charge therein and an overflow drain for draining off a superfluous charge, both of which are provided in the form of N - type semiconductor areas apart from each other, and a plurality of photo-sensing areas for storing the signal charge produced in response to the light from the outside formed between each adjacent two of the P - type semiconductor regions are provided on the semiconductor layer of the N - type, so that no needless

Abstract: The present invention is directed to a solid state image sensor comprising a charge transfer device such as a charge coupled device (CCD), wherein an improved arrangement of transfer electrodes is provided for the charge transfer device therein and the number of effective sensing elements for performing practically the image sensing operation can be altered in accordance with the manner of supplying a driving signal to the transfer electrodes, so that either one of different television signals, for example, color television signals according to the NTSC system and the PAL or SECAM system, can be selectively produced thereby.