Patents by Inventor Kang Heon Hur

Kang Heon Hur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180090458
    Abstract: A fan-out semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, an encapsulant sealing at least a portion of the inactive surface, a first connection member disposed on the active surface and including a redistribution layer and a first via electrically connecting the connection pad to the redistribution layer, a passivation layer disposed on the first connection member, and an under-bump metal layer including an external connection pad disposed on the passivation layer and a second via connecting the external connection pad to the redistribution layer. In a vertical direction, the first and second vias are disposed within the external connection pad and do not overlap each other.
    Type: Application
    Filed: January 10, 2017
    Publication date: March 29, 2018
    Inventors: Han KIM, Kyung Moon JUNG, Seok Hwan KIM, Kyung Ho LEE, Kang Heon HUR
  • Publication number: 20170287853
    Abstract: The fan-out semiconductor package includes: a semiconductor chip having an active surface having a connection pad disposed thereon and an inactive surface disposed to oppose the active surface; a first capacitor disposed adjacently to the semiconductor chip; an encapsulant at least partially encapsulating the first connection member and the semiconductor chip; a first connection member disposed on the encapsulant, the first capacitor, and the semiconductor chip, and a second capacitor disposed on the other surface of the first connection member opposing one surface of the first connection member on which the semiconductor chip is disposed, wherein the first connection member includes a redistribution layer electrically connected to the connection pad of the semiconductor chip, the first capacitor, and the second capacitor, and the first capacitor and the second capacitor are electrically connected to the connection pad through a common power wiring of the redistribution layer.
    Type: Application
    Filed: September 28, 2016
    Publication date: October 5, 2017
    Inventors: Han KIM, Mi Ja HAN, Kang Heon HUR, Young Gwan KO
  • Publication number: 20170271071
    Abstract: Disclosed are a method of manufacturing a coil device and a coil device, which includes a base layer and a coil pattern formed on a surface of the base layer. In an aspect, the method of manufacturing a coil device includes forming a seed layer of a coil by bonding a copper foil to a base layer, etching to remove a portion of the copper foil, and plating a plating layer on the seed layer.
    Type: Application
    Filed: October 5, 2016
    Publication date: September 21, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Han KIM, Kang Heon HUR, Sang Jong LEE, Jung Wook SEO
  • Patent number: 9680084
    Abstract: A piezoelectric element driving apparatus may apply a predetermined driving signal to a piezoelectric element to drive the piezoelectric element. The driving signal may be an asymmetrical waveform in which amplitudes of first and second polarities thereof are different from each other. An exemplary embodiment in the present disclosure may provide a piezoelectric element driving apparatus and method having a high output while protecting dielectric characteristics of a piezoelectric element by driving the piezoelectric element using an asymmetrical driving signal.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: June 13, 2017
    Assignee: MPLUS CO., LTD.
    Inventors: Joo Yul Ko, Jung Wook Seo, Ho kwon Yoon, Hong Yeon Cho, Boum Seock Kim, Kang Heon Hur
  • Publication number: 20170162527
    Abstract: An electronic component package may include: a redistribution layer including a first insulating layer, a first conductive pattern disposed on the first insulating layer, and a first via connected to the first conductive pattern while penetrating through the first insulating layer; an electronic component disposed on the redistribution layer; and an encapsulant encapsulating the electronic component. The first via has a horizontal cross-sectional shape in which a distance between first and second edge points of the first via in a first direction passing through the center of the first via and the first and second edge points thereof is shorter than that between third and fourth edge points of the first via in a second direction perpendicular to the first direction and passing through the center of the first via and the third and fourth points thereof.
    Type: Application
    Filed: July 6, 2016
    Publication date: June 8, 2017
    Inventors: Han KIM, Young Gwan KO, Kang Heon HUR, Kyung Moon JUNG, Sung Han KIM
  • Patent number: 9660013
    Abstract: Disclosed herein is a chip inductor. The chip inductor according to the present invention includes a substrate on which a trough-hole is formed, a conductive coil that is formed on the substrate, an upper resin composite magnetic layer that is filled to surround the conductive coil so that a core is formed on a center portion of the substrate, a lower resin composite magnetic layer that is formed on a bottom portion of the substrate, and an external electrode that is formed on both sides of the upper and lower resin composite magnetic layers.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 23, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hwan Soo Lee, Hye Yeon Cha, Jung Min Park, Kang Heon Hur, Moon Soo Park
  • Patent number: 9659708
    Abstract: A method for manufacturing an inductor including preparing an insulating layer; forming a polymer layer including a coil pattern on the insulating layer; forming a stacked structure by heat treating the insulating layer and the polymer layer; and forming an external electrode to electrically connect the coil pattern for the stacked structure.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: May 23, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Kwon Wi, Young Seuck Yoo, Jeong Bok Kwak, Yong Suk Kim, Sang Moon Lee, Kang Heon Hur
  • Patent number: 9609183
    Abstract: There is provided a camera module including: a lens housing in which a lens is disposed; a glass cover formed of a transparent material and covering the lens housing; and a coil conductive part formed between an outer surface of the lens and an inner surface of the glass cover.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: March 28, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kang Ryong Choi, Hyung Jin Jeon, Jeong Gu Yeo, Kang Heon Hur, Sung Yong An, Jung Wook Seo
  • Patent number: 9595392
    Abstract: Disclosed are a multilayer ceramic condenser and a method of manufacturing the same. The method includes printing a plurality of stripe-type inner electrode patterns in parallel on ceramic green sheets; forming a laminate by staking the ceramic green sheets having the plurality of stripe-type inner electrode patterns printed thereon; cutting the laminate in order to have a structure in which first and second inner electrode patterns are alternately stacked; and forming a first side part and a second side part by applying ceramic slurry in order to cover the sides of the laminate to which the first and second inner electrode patterns are exposed.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: March 14, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Joon Kim, Jong Hoon Kim, Kang Heon Hur, Dae Bok Oh
  • Patent number: 9577598
    Abstract: Disclosed herein is a thin film type common mode filter including: a base substrate made of an insulating material; a first insulating layer formed on the base substrate; a coil-shaped internal electrode formed on the first insulating layer; a second insulating layer formed on the internal electrode; an external electrode terminal having a vertical section connected to a side surface of the internal electrode and a horizontal section extended from an upper end of the vertical section toward a horizontal direction to thereby form a parallel surface spaced apart from the internal electrode by a predetermined distance; and a ferrite resin layer formed between the horizontal section of the external electrode terminal and the internal electrode.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: February 21, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Seuck Yoo, Kang Heon Hur, Young Ghyu Ahn, Chan Yoon, Sung Kwon Wi, Jeong Min Cho, Geon Se Chang, Young Do Kweon
  • Publication number: 20170040265
    Abstract: The present disclosure relates to a fan-out semiconductor package and a method of manufacturing the same. The fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member includes a first insulating layer, a first redistribution layer and a second redistribution layer disposed on one surface and the other surface of the first insulating layer opposing the one surface thereof, respectively, a second insulating layer disposed on the first insulating layer and covering the first redistribution layer, and a third redistribution layer disposed on the second insulating layer. A fan-out semiconductor package may include one or more connection units instead of the first connection member.
    Type: Application
    Filed: October 19, 2016
    Publication date: February 9, 2017
    Inventors: Dae Hyun PARK, Han KIM, Kang Heon HUR, Young Gwan KO, Jung Ho SHIM
  • Publication number: 20170005519
    Abstract: A wireless power receiving device includes a first coil partially disposed in an outer region and configured to transmit and/or receive data; and a second coil disposed inwardly of an inner boundary line of the outer region and configured to receive wirelessly transmitted power, wherein a center defined by an inner boundary line and a center defined by an outer boundary line of the second coil are different from each other.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 5, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Jong LEE, Han KIM, Tae Ho YUN, Kang Heon HUR, Su Bong JANG
  • Patent number: 9520223
    Abstract: The present invention relates to an inductor. An inductor in accordance with an embodiment of the present invention includes: an insulating layer having a hole; a conductive pattern disposed on both surfaces of the insulating layer and having a structure in which portions disposed on the both surfaces are electrically connected to each other through the hole; and a magnetic layer disposed on the insulating layer to cover the conductive pattern, wherein the conductive pattern has a plating pattern formed by performing a plating process.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: December 13, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Seuck Yoo, Kang Heon Hur, Jin Hyuck Yang, Sung Kwon Wi, Jong Yun Lee, Young Do Kweon
  • Publication number: 20160338202
    Abstract: An electronic component package and a method of manufacturing the same are provided. The electronic component package includes a frame having a through-hole, an electronic component disposed in the through-hole of the frame, and a redistribution part disposed at one side of the frame and the electronic component. One or more first wiring layers of the frame are electrically connected to the electronic component through the redistribution part.
    Type: Application
    Filed: May 2, 2016
    Publication date: November 17, 2016
    Inventors: Dae Hyun PARK, Han KIM, Kang Heon HUR, Young Gwan KO, Jung Ho SHIM
  • Publication number: 20160329146
    Abstract: There is provided a power inductor including: a lower substrate formed of a magnetic material; an inductor main body formed on an upper surface of the lower substrate; at least one coil portion including a conductive via and formed inside the inductor main body; and external electrodes formed at both ends of the inductor main body and electrically connected to the at least one coil portion.
    Type: Application
    Filed: July 20, 2016
    Publication date: November 10, 2016
    Inventors: Hwan-Soo LEE, Kang Heon HUR, Jung Min PARK, Hye Yeon CHA
  • Patent number: 9472608
    Abstract: Disclosed herein is a chip inductor. The chip inductor according to the present invention includes a substrate on which a through-hole is formed, a conductive coil that is formed on the substrate, an upper resin composite magnetic layer that is filled to surround the conductive coil so that a core is formed on a center portion of the substrate, a lower resin composite magnetic layer that is formed on a bottom portion of the substrate, and an external electrode that is formed on both sides of the upper and lower resin composite magnetic layers.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: October 18, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Hwan Soo Lee, Hye Yeon Cha, Jung Min Park, Kang Heon Hur, Moon Soo Park
  • Publication number: 20160172098
    Abstract: A chip electronic component includes a magnetic body including magnetic metal powder particles, an internal coil unit embedded in the magnetic body, and a cover unit disposed on at least one of upper and lower surfaces of the magnetic body and including a magnetic metal plate. The magnetic metal plate is cracked and includes a plurality of metal fragments.
    Type: Application
    Filed: December 7, 2015
    Publication date: June 16, 2016
    Inventors: Jong Suk JEONG, Kang Heon HUR, Seong Jae LEE, Jung Wook SEO, Hiroyuki MATSUMOTO, Chul Min SIM, Jong Sik YOON
  • Publication number: 20160118178
    Abstract: Disclosed herein is a chip inductor. The chip inductor according to the present invention includes a substrate on which a trough-hole is formed, a conductive coil that is formed on the substrate, an upper resin composite magnetic layer that is filled to surround the conductive coil so that a core is formed on a center portion of the substrate, a lower resin composite magnetic layer that is formed on a bottom portion of the substrate, and an external electrode that is formed on both sides of the upper and lower resin composite magnetic layers.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 28, 2016
    Inventors: Hwan Soo LEE, Hye Yeon CHA, Jung Min PARK, Kang Heon HUR, Moon Soo PARK
  • Patent number: 9236173
    Abstract: The present invention discloses a coil part including: a lower magnetic body; primary and secondary lower patterns formed on the lower magnetic body in a spiral shape in parallel to each other; a lower insulating layer covering the primary and secondary lower patterns; primary and secondary upper patterns electrically connected to the primary and secondary lower patterns, respectively, and formed on the lower insulating layer in a spiral shape in parallel to each other to correspond to the primary and secondary lower patterns; and an upper magnetic body formed on the primary and secondary upper patterns, wherein the primary and secondary upper patterns have portions which cross the primary and secondary lower patterns on the plane, and a method of manufacturing the same.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: January 12, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Seuck Yoo, Young Ghyu Ahn, Yong Suk Kim, Sang Moon Lee, Jeong Bok Kwak, Kang Heon Hur, Sung Kwon Wi
  • Patent number: 9230727
    Abstract: Disclosed herein is a common mode filter including an internal electrode manufactured in a coil electrode form and provided with a simultaneous coil pattern in which two coil electrodes are overlapped with each other in a single layer in a direction in which a coil is wound, wherein a height of a second insulating layer formed on the internal electrode is higher than an interval between the coils. Therefore, a portion at which a parasitic capacitance is generated may be basically blocked, and a self resonant frequency (SRF) may be increased while filtering performance as the common mode filter is maintained.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 5, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Seuck Yoo, Kang Heon Hur, Sung Kwon Wi, Ho Jin Yun, Jong Yun Lee, Ju Hwan Yang, Jin Hyuck Yang, Young Do Kweon, Eun Ha Kim