Patents by Inventor Kang-Min Kuo

Kang-Min Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200044016
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.
    Type: Application
    Filed: October 7, 2019
    Publication date: February 6, 2020
    Inventors: Chih-Wei LIN, Chih-Lin WANG, Kang-Min KUO
  • Publication number: 20200020771
    Abstract: In a method of manufacturing a semiconductor device, a fin structure is formed over a substrate. The fin structure has a channel region and a source/drain region. A gate structure is formed over the channel region of the fin structure. A first source/drain etching is performed to recess the source/drain region of the fin structure. After the first source/drain etching, a second source/drain etching is performed to further recess the source/drain region of the fin structure. After the second source/drain etching, a third source/drain etching is performed to further recess the source/drain region of the fin structure, thereby forming a source/drain recess. One or more epitaxial layers are formed in the source/drain recess. The first source/drain etching is isotropic etching and the second source/drain etching is anisotropic etching.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 16, 2020
    Inventors: Lung CHEN, Kang-Min KUO, Long-Jie HONG
  • Publication number: 20200006336
    Abstract: A method of manufacturing a semiconductor device includes forming a first transistor structure and a second transistor structure on a substrate, wherein source/drain structures of the first transistor structure and the second transistor structure are merged. The first and second transistor structures are separated by etching the source/drain structures.
    Type: Application
    Filed: June 17, 2019
    Publication date: January 2, 2020
    Inventors: Chen LUNG, Long-Jie HONG, Kang-Min KUO
  • Patent number: 10522543
    Abstract: Methods for forming a semiconductor structure are provided. The method includes forming a first dummy gate structure and forming first spacers over a sidewall of the first dummy gate structure. The method includes removing the first dummy gate structure to form a first trench between the first spacers and forming a first capping layer in the first trench. A first portion of the first capping layer covers a sidewall of the first trench and a second portion of the first capping layer covers a bottom surface of the first trench. The method further includes oxidizing a sidewall of the first portion of the first capping layer and a top surface of the second portion of the first capping layer to form a first capping oxide layer and forming a first work function metal layer and forming a first gate electrode layer over the first work function metal layer.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Lin, Chih-Lin Wang, Kang-Min Kuo, Cheng-Wei Lian
  • Patent number: 10515866
    Abstract: Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the layer. A plurality of bar or pillar structures are spaced apart from one another and laterally surround the conductive body. The plurality of bar or pillar structures are generally concentric around the conductive body.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying-Chieh Liao, Han-Wei Yang, Chen-Chung Lai, Kang-Min Kuo, Bor-Zen Tien
  • Patent number: 10505023
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first fin structure and a second fin structure over a semiconductor substrate, and forming a mask layer covering the first fin structure and the second fin structure. The method also includes performing a first etching operation using the second fin structure as an etch stop layer to partially remove the mask layer such that the etch stop layer protrudes from the mask layer after the first etching operation. The method further includes partially removing the second fin structure using a second etching operation after the first etching operation.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: December 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Lung Chen, Kang-Min Kuo, Wen-Hsin Chan
  • Publication number: 20190355814
    Abstract: A semiconductor device includes a semiconductive substrate, a first semiconductive fin and a second semiconductive fin extending upwards from the semiconductive substrate, an isolation structure at least partially between the first semiconductive fin and the second semiconductive fin, a first semiconductive raised portion and a second semiconductive raised portion. The first semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive fin and the second semiconductive fin. A top surface of the first semiconductive fin is higher than a top surface of the first semiconductive raised portion. The second semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive raised portion and the second semiconductive fin.
    Type: Application
    Filed: July 29, 2019
    Publication date: November 21, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cong-Min FANG, Kang-Min KUO, Shi-Min WU
  • Patent number: 10475699
    Abstract: The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: November 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Jia Hsieh, Long-Jie Hong, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 10461169
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a metal gate electrode structure and an insulating layer over the semiconductor substrate. The insulating layer surrounds the metal gate electrode structure. The method includes nitrifying a first top portion of the metal gate electrode structure to form a metal nitride layer over the metal gate electrode structure.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Ruei Yeh, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 10439022
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 8, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Lin, Chih-Lin Wang, Kang-Min Kuo
  • Patent number: 10367059
    Abstract: A method of manufacturing a semiconductor structure includes the following steps. A first raised portion is formed on a semiconductor substrate. The height of the first raised portion is reduced, and a dielectric material is formed over the first raised portion. The dielectric material is annealed such that the first raised portion is tilted.
    Type: Grant
    Filed: September 9, 2017
    Date of Patent: July 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cong-Min Fang, Kang-Min Kuo, Shi-Min Wu
  • Patent number: 10325914
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a metal-oxide-semiconductor (MOS) transistor, and a dielectric layer. The MOS transistor includes a gate structure formed over the substrate. The dielectric layer is formed aside the gate structure, and the dielectric layer is doped with a strain modulator. An effective lattice constant of the dielectric layer doped with the strain modulator is different from an original lattice constant of the dielectric layer prior to be doped with the strain modulator, wherein the strain modulator at least comprises silicon.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: June 18, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Chi Tsai, Kang-Min Kuo
  • Publication number: 20190115273
    Abstract: Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the layer. A plurality of bar or pillar structures are spaced apart from one another and laterally surround the conductive body. The plurality of bar or pillar structures are generally concentric around the conductive body.
    Type: Application
    Filed: December 13, 2018
    Publication date: April 18, 2019
    Inventors: Ying-Chieh Liao, Han-Wei Yang, Chen-Chung Lai, Kang-Min Kuo, Bor-Zen Tien
  • Publication number: 20190109206
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first fin structure and a second fin structure over a semiconductor substrate, and forming a mask layer covering the first fin structure and the second fin structure. The method also includes performing a first etching operation using the second fin structure as an etch stop layer to partially remove the mask layer such that the etch stop layer protrudes from the mask layer after the first etching operation. The method further includes partially removing the second fin structure using a second etching operation after the first etching operation.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 11, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lung CHEN, Kang-Min KUO, Wen-Hsin CHAN
  • Patent number: 10157810
    Abstract: Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the layer. A plurality of bar or pillar structures are spaced apart from one another and laterally surround the conductive body. The plurality of bar or pillar structures are generally concentric around the conductive body.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying-Chieh Liao, Han-Wei Yang, Chen-Chung Lai, Kang-Min Kuo, Bor-Zen Tien
  • Publication number: 20180350814
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a metal-oxide-semiconductor (MOS) transistor, and a dielectric layer. The MOS transistor includes a gate structure formed over the substrate. The dielectric layer is formed aside the gate structure, and the dielectric layer is doped with a strain modulator. An effective lattice constant of the dielectric layer doped with the strain modulator is different from an original lattice constant of the dielectric layer prior to be doped with the strain modulator, wherein the strain modulator at least comprises silicon.
    Type: Application
    Filed: August 8, 2018
    Publication date: December 6, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Chi Tsai, Kang-Min Kuo
  • Patent number: 10147805
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a first fin structure over a semiconductor substrate. The semiconductor device structure also includes a second fin structure over the semiconductor substrate. The second fin structure has a lower height than that of the first fin structure. The second fin structure includes a first sidewall and a second sidewall, and the first sidewall and the second sidewall surround a recess over the second fin structure.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: December 4, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Lung Chen, Kang-Min Kuo, Wen-Hsin Chan
  • Publication number: 20180342514
    Abstract: Methods for forming a semiconductor structure are provided. The method includes forming a first dummy gate structure and forming first spacers over a sidewall of the first dummy gate structure. The method includes removing the first dummy gate structure to form a first trench between the first spacers and forming a first capping layer in the first trench. A first portion of the first capping layer covers a sidewall of the first trench and a second portion of the first capping layer covers a bottom surface of the first trench. The method further includes oxidizing a sidewall of the first portion of the first capping layer and a top surface of the second portion of the first capping layer to form a first capping oxide layer and forming a first work function metal layer and forming a first gate electrode layer over the first work function metal layer.
    Type: Application
    Filed: August 6, 2018
    Publication date: November 29, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Wei LIN, Chih-Lin WANG, Kang-Min KUO, Cheng-Wei LIAN
  • Publication number: 20180337174
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first source region, a second source region, a first drain region, and a second drain region. The semiconductor device structure includes a first gate structure over the substrate and between the first source region and the first drain region. The semiconductor device structure includes a second gate structure over the substrate and between the second source region and the second drain region. A first thickness of the first gate structure is greater than a second thickness of the second gate structure. A first gate width of the first gate structure is less than a second gate width of the second gate structure.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Inventors: Cong-Min FANG, Chih-Lin WANG, Kang-Min KUO
  • Patent number: 10096596
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first source region, a second source region, a first drain region, and a second drain region. The semiconductor device structure includes a first gate structure over the substrate and between the first source region and the first drain region. The semiconductor device structure includes a second gate structure over the substrate and between the second source region and the second drain region. A first thickness of the first gate structure is greater than a second thickness of the second gate structure. A first gate width of the first gate structure is less than a second gate width of the second gate structure.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: October 9, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cong-Min Fang, Chih-Lin Wang, Kang-Min Kuo