Abstract: A method of manufacturing an overlay mark is provided. Two first X-direction isolation structures, two first Y-direction isolation structures, two second X-direction isolation structures, and two second Y-direction isolation structures are formed in a substrate, where the first X-direction isolation structures and the first Y-direction isolation structures are arranged to a first rectangle, and the second X-direction isolation structures and the second Y-direction isolation structures are arranged to a second rectangle. The second rectangle is located in the first rectangle. A first dielectric layer and a conductive layer are formed sequentially on the substrate. A planarization process is performed to remove a portion of the conductive layer till the isolation structures are exposed. A second dielectric layer is formed on the substrate. A rectangle pattern is formed on the second dielectric layer. The sides of the rectangle pattern are located above the isolation structures.

Abstract: An immersion lithography process is described. First, a photoresist layer on a material layer is formed. Then, an acid compensation layer is formed on the photoresist layer. An immersion exposure step is performed on the acid compensation layer and the photoresist layer. The acid compensation layer contains a photo-acid generator with a concentration of the photo-acid higher than that produced by a photo-acid generator in the photoresist layer after the immersion exposure step. Then, a development step is performed to pattern the acid compensation layer and the photoresist layer.

Abstract: An immersion lithography process is described. First, a photoresist layer on a material layer is formed. Then, an acid compensation layer is formed on the photoresist layer. An immersion exposure step is performed on the acid compensation layer and the photoresist layer. The acid compensation layer contains a photo-acid generator with a concentration of the photo-acid higher than that produced by a photo-acid generator in the photoresist layer after the immersion exposure step. Then, a development step is performed to pattern the acid compensation layer and the photoresist layer.

Abstract: First of all, a substrate applied in the lithography process is provided, and then a high transmission attenuate layer (HTAL) is formed on the substrate. Then an opaque layer is formed on the high transmission attenuate layer (HTAL), and then an ion-implanting process is performed in the high transmission attenuate layer (HTAL). Afterward, the opaque layer is etched to define a first phase region and a second phase region on the high transmission attenuate layer (HTAL). Subsequently, a photoresist layer is formed on the second phase region and the opaque layer to expose a partial surface of the high transmission attenuate layer (HTAL) that is located the first phase region. Then the partial surface of the high transmission attenuate layer (HTAL) that is located on the first phase region is etched through until a predetermined depth in the substrate.

Abstract: A semiconductor apparatus and method for upgrading uniformity of critical dimension by compensating the flare effect at wafer edge are disclosed. In one embodiment of the invention, the invention uses an exposure plate mounted on tilt pincettes which can protrude and retract from a wafer stage of a stepper to eliminate the alteration of uniformity of critical dimension at wafer edge. The exposure plate uses the tilt pincettes to tilt along with a wafer so as to keep planar with the wafer.

Abstract: First of all, a substrate applied in the lithography process is provided, and then a high transmission attenuate layer (HTAL) is formed on the substrate. Then an opaque layer is formed on the high transmission attenuate layer (HTAL), and then an ion-implanting process is performed in the high transmission attenuate layer (HTAL). Afterward, the opaque layer is etched to define a first phase region and a second phase region on the high transmission attenuate layer (HTAL). Subsequently, a photoresist layer is formed on the second phase region and the opaque layer to expose a partial surface of the high transmission attenuate layer (HTAL) that is located the first phase region. Then the partial surface of the high transmission attenuate layer (HTAL) that is located on the first phase region is etched through until a predetermined depth in the substrate.

Abstract: A semiconductor apparatus and method for upgrading uniformity of critical dimension by compensating the flare effect at wafer edge are disclosed. In one embodiment of the invention, the invention uses an exposure plate mounted on tilt pincettes which can protrude and retract from a wafer stage of a stepper to eliminate the alteration of uniformity of critical dimension at wafer edge. The exposure plate uses the tilt pincettes to tilt along with a wafer so as to keep planar with the wafer.

Abstract: A photomask set and a photolithographic operation suitable for forming a desired pattern on a photoresist layer. The photomask set includes a plurality of photomasks each having a different pattern thereon. To form an overall pattern on the photoresist layer, each photomask is used in turn in a multi-exposure operation.

Abstract: A multilayer photoresist process in photolithography, which is applicable on a substrate having a composite photoresist layer with a desired thickness formed thereon. The present invention provides a process, comprising the following steps. A photoresist layer is formed on a substrate, and subsequently exposed through a photomask, followed by the developing process to pattern the photoresist. Then, the patterned photoresist layer is stabilized. This sequence is repeated untill at least another one layer is deposited and patterned on the substrate. Each photoresist layer has almost the same pattern with the underlying patterned photoresist layer. Many thin photoresist layers are accumulated to form a composite photoresist layer with a desired thickness.

Abstract: A photomask set and a photolithographic operation suitable for forming a desired pattern on a photoresist layer. The photomask set includes a plurality of photomasks each having a different pattern thereon. To form an overall pattern on the photoresist layer, each photomask is used in turn in a multi-exposure operation.

Abstract: A method for the mitigation of the generation of side-lobes in a photolithography process is described. The method includes the steps of forming a photoresist layer on a semiconductor substrate. An exposure process is conducted on the photoresist layer with a phase-shifting mask, transferring the pattern of the mask on the photoresist layer. After this, a post-exposure baking process is conducted on the photoresist layer after it has been exposed, followed by performing a development process to complete the patterning of the photoresist layer.

Abstract: A method of reducing the optical proximity effect of an exposed etch pattern occurred during a conventional photolithography process, wherein a primary pattern according to the present invention is first divided into a plurality of sub-patterns. Each of the sub-patterns formed on a photomask is then exposed under a light source to be sequentially transferred onto a corresponding photoresist layer during a photolithography process. Subsequently, the operating parameters of a stepper used in the photolithography process such as numerical perture, coherence, intensity of energy, and intensity of light are set according to the charts as shown in FIG. 5A, 5B, 6A, 6B, and 6C to obtain desirable critical dimensions, thereby reduces the optical proximity effect. Therefore, an etch pattern with different line pitches can be successfully transferred onto a photoresist layer with each critical dimension of the different line pitches accurately met according to the present invention.