Patents by Inventor Kaoru Sakaguchi

Kaoru Sakaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948708
    Abstract: To provide a resistance device which has a small temperature dependence, in which a resistance value is adjustable in a wide range of from a high resistance value to a low resistance value, and which has a small circuit area, and to provide a current detection circuit including the resistance device. The resistance device is to be connected between two terminals, and a resistance value thereof is variable, the resistance device including: a reference resistor; a series variable resistor circuitry including at least one parallel variable resistor circuit which is connected in series to each other, and which each includes a resistor and a trimming element connected in parallel to the resistor; and a parallel variable resistor circuitry including at least one series variable resistor circuit which is connected in parallel to each other, and which each includes a resistor and a trimming element connected in series to the resistor.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: April 2, 2024
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Patent number: 11695406
    Abstract: An overcurrent protection circuit configured to limit an output current flowing through an output transistor includes a sense transistor that provides a sense current proportional to the output current, a sense resistor through which the sense current flows, a current limiting circuit that detects a sense voltage generated by the sense resistor and controls a gate voltage of the output transistor, and a current correction circuit that provides the sense resistor with a corrected sense current added to the sense current based on a difference of voltage between a drain voltage of the output transistor and a drain voltage of the sense transistor.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: July 4, 2023
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Patent number: 11387825
    Abstract: An overheat protection circuit includes a first constant current source which supplies a first constant current to a temperature sensitive element, a first transistor provided between the temperature sensitive element and the first constant current source, an output current detection circuit which controls a gate voltage of the first transistor by a voltage based on a sense current corresponding to an output current of a semiconductor device, and an output circuit which supplies an overheat detection signal based on a result of comparison between a temperature sensitive current and the first constant current.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: July 12, 2022
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Publication number: 20220189668
    Abstract: To provide a resistance device which has a small temperature dependence, in which a resistance value is adjustable in a wide range of from a high resistance value to a low resistance value, and which has a small circuit area, and to provide a current detection circuit including the resistance device. The resistance device is to be connected between two terminals, and a resistance value thereof is variable, the resistance device including: a reference resistor; a series variable resistor circuitry including at least one parallel variable resistor circuit which is connected in series to each other, and which each includes a resistor and a trimming element connected in parallel to the resistor; and a parallel variable resistor circuitry including at least one series variable resistor circuit which is connected in parallel to each other, and which each includes a resistor and a trimming element connected in series to the resistor.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 16, 2022
    Inventor: Kaoru SAKAGUCHI
  • Publication number: 20220190815
    Abstract: An overcurrent protection circuit configured to limit an output current flowing through an output transistor includes a sense transistor that provides a sense current proportional to the output current, a sense resistor through which the sense current flows, a current limiting circuit that detects a sense voltage generated by the sense resistor and controls a gate voltage of the output transistor, and a current correction circuit that provides the sense resistor with a corrected sense current added to the sense current based on a difference of voltage between a drain voltage of the output transistor and a drain voltage of the sense transistor.
    Type: Application
    Filed: November 8, 2021
    Publication date: June 16, 2022
    Inventor: Kaoru SAKAGUCHI
  • Patent number: 11294410
    Abstract: A voltage regulator includes an error amplifier which controls the gate of an output transistor so that a feedback voltage based on an output voltage of an output terminal matches a first reference voltage, a first transistor having a gate to which a second reference voltage is supplied, and a first resistor connected between the gate of the output transistor and the source of the first transistor. The first resistor functions as a resistance constituting a phase compensation circuit by a current flowing therethrough in response to a small output current of the output transistor.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 5, 2022
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Patent number: 10915126
    Abstract: A voltage regulator includes an output voltage terminal which supplies an output voltage having a preset value, a voltage adjustment terminal which detects the output voltage, an error amplifier which compares the output voltage and a reference voltage to control the output voltage, a phase compensation capacitor, a test circuit which switches a normal mode with a test mode to test the phase compensation capacitor, a switch which makes the phase compensation capacitor valid or invalid, and a constant current source which makes a bias current of the error amplifier in the test mode lower than that in the normal mode.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: February 9, 2021
    Assignee: ABLIC INC.
    Inventors: Kaoru Sakaguchi, Yasuhiko Ogura, Munetaka Yoshimura, Hiroki Takahashi
  • Patent number: 10884441
    Abstract: A voltage regulator includes an error amplifier which receives a feedback voltage and a reference voltage, an amplifier circuit which receives an output voltage of the error amplifier and controls a gate of an output transistor by a first output voltage, and a non-regulation detection circuit which detects a non-regulation state of the voltage regulator based on a second output voltage of the amplifier circuit. The amplifier circuit includes a first transistor receiving the output voltage of the error amplifier at a gate of the first transistor, and a second transistor connected to a drain of the first transistor, and provides the second output voltage based on a gate-source voltage of the second transistor.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: January 5, 2021
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Publication number: 20200379492
    Abstract: A voltage regulator includes an error amplifier which controls the gate of an output transistor so that a feedback voltage based on an output voltage of an output terminal matches a first reference voltage, a first transistor having a gate to which a second reference voltage is supplied, and a first resistor connected between the gate of the output transistor and the source of the first transistor. The first resistor functions as a resistance constituting a phase compensation circuit by a current flowing therethrough in response to a small output current of the output transistor.
    Type: Application
    Filed: May 21, 2020
    Publication date: December 3, 2020
    Inventor: Kaoru Sakaguchi
  • Patent number: 10824181
    Abstract: A reference voltage circuit includes a first MOS transistor pair having a first MOS transistor of an enhancement type having a gate and a drain connected to each other, and a second MOS transistor of a depletion type having a gate connected to a source of the first MOS transistor, a source connected to the drain of the first MOS transistor, and a drain connected to an output terminal; and a second MOS transistor pair having a third MOS transistor of an enhancement type having a gate and a drain connected to the output terminal and a source connected to the source of the second MOS transistor, and a fourth MOS transistor of a depletion type having a gate connected to the source of the third MOS transistor and a source connected to the output terminal. All the MOS transistors operate in a weak inversion region.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: November 3, 2020
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Publication number: 20200257325
    Abstract: A reference voltage circuit includes a first MOS transistor pair having a first MOS transistor of an enhancement type having a gate and a drain connected to each other, and a second MOS transistor of a depletion type having a gate connected to a source of the first MOS transistor, a source connected to the drain of the first MOS transistor, and a drain connected to an output terminal; and a second MOS transistor pair having a third MOS transistor of an enhancement type having a gate and a drain connected to the output terminal and a source connected to the source of the second MOS transistor, and a fourth MOS transistor of a depletion type having a gate connected to the source of the third MOS transistor and a source connected to the output terminal. All the MOS transistors operate in a weak inversion region.
    Type: Application
    Filed: January 27, 2020
    Publication date: August 13, 2020
    Inventor: Kaoru SAKAGUCHI
  • Patent number: 10705553
    Abstract: A constant current circuit includes a first current mirror circuit connected to a first power supply and having a first input transistor and a first output transistor of a first conductivity type, a second current mirror circuit having a second output transistor of a second conductivity type provided between the first input transistor and a second power supply, and a second input transistor of the second conductivity type provided between the first output transistor and the second power supply, a resistor interposed between the second output transistor and the second power supply, and a capacitor having one end connected to the first power supply and the other end connected to a connecting point of the second output transistor and the resistor.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: July 7, 2020
    Assignee: Ablic Inc.
    Inventor: Kaoru Sakaguchi
  • Publication number: 20200177174
    Abstract: An overheat protection circuit includes a first constant current source which supplies a first constant current to a temperature sensitive element, a first transistor provided between the temperature sensitive element and the first constant current source, an output current detection circuit which controls a gate voltage of the first transistor by a voltage based on a sense current corresponding to an output current of a semiconductor device, and an output circuit which supplies an overheat detection signal based on a result of comparison between a temperature sensitive current and the first constant current.
    Type: Application
    Filed: November 20, 2019
    Publication date: June 4, 2020
    Inventor: Kaoru SAKAGUCHI
  • Patent number: 10666244
    Abstract: A comparator includes a first constant current source, a first transistor having a drain connected to the first constant current source, a gate connected to a non-inverted input terminal, and a source connected to an inverted input terminal, a second constant current source connected between the inverted input terminal and a second power supply terminal, a second transistor having a source connected to a first power supply terminal, a gate connected to the drain of the first transistor, and a drain connected to an output terminal, and a third constant current source connected between the drain of the second transistor and the second power supply terminal. An oscillation circuit includes comparators in which at least one of the comparators is a comparator described above.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: May 26, 2020
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Patent number: 10613122
    Abstract: Provided is a monitoring circuit for a system including an LDO regulator. The monitoring circuit includes: a non-saturation detection circuit configured to detect a non-saturation state of an output transistor of the LDO regulator configured to supply a power supply voltage to an MPU; a current detection circuit configured to detect that an output current from the output transistor is equal to or more than a predetermined current value; and a watchdog timer configured to monitor operation of the MPU. The watchdog timer is enabled when the output transistor is not in a non-saturation state and an output current from the output transistor is equal to or more than a predetermined current value.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 7, 2020
    Assignee: ABLIC Inc.
    Inventor: Kaoru Sakaguchi
  • Patent number: 10606703
    Abstract: Provided is a monitoring circuit equipped with a first abnormality detection circuit which detects a first abnormal state of a semiconductor device under surveillance, a second abnormality detection circuit which detects a second abnormal state of the semiconductor device under surveillance, a reset circuit which outputs a reset signal based on a logical sum of a first abnormality detection signal output from the first abnormality detection circuit and a second abnormality detection signal output from the second abnormality detection circuit to a first output terminal, and an output holding circuit which stores which of the first abnormality detection signal and the second abnormality detection signal is supplied, and outputs an abnormality discrimination signal corresponding thereto to a second output terminal.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: March 31, 2020
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Publication number: 20200081474
    Abstract: A constant current circuit includes a first current mirror circuit connected to a first power supply and having a first input transistor and a first output transistor of a first conductivity type, a second current mirror circuit having a second output transistor of a second conductivity type provided between the first input transistor and a second power supply, and a second input transistor of the second conductivity type provided between the first output transistor and the second power supply, a resistor interposed between the second output transistor and the second power supply, and a capacitor having one end connected to the first power supply and the other end connected to a connecting point of the second output transistor and the resistor.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 12, 2020
    Inventor: Kaoru SAKAGUCHI
  • Publication number: 20200073424
    Abstract: A voltage regulator includes an output voltage terminal which supplies an output voltage having a preset value, a voltage adjustment terminal which detects the output voltage, an error amplifier which compares the output voltage and a reference voltage to control the output voltage, a phase compensation capacitor, a test circuit which switches a normal mode with a test mode to test the phase compensation capacitor, a switch which makes the phase compensation capacitor valid or invalid, and a constant current source which makes a bias current of the error amplifier in the test mode lower than that in the normal mode.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 5, 2020
    Inventors: Kaoru Sakaguchi, Yasuhiko Ogura, Munetaka Yoshimura, Hiroki Takahashi
  • Patent number: 10571941
    Abstract: A voltage regulator includes an error amplifier which receives a feedback voltage and a reference voltage and thereby controls a gate voltage of an output transistor, a non-regulation detection circuit having a differential amplifier circuit operating on a current corresponding to an output current of the output transistor, and an overshoot suppression circuit having an overshoot detection circuit which enables an overshoot detection by a signal indicating the detection of non-regulation state from the non-regulation detection circuit.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 25, 2020
    Assignee: ABLIC INC.
    Inventor: Kaoru Sakaguchi
  • Publication number: 20190386650
    Abstract: A comparator includes a first constant current source, a first transistor having a drain connected to the first constant current source, a gate connected to a non-inverted input terminal, and a source connected to an inverted input terminal, a second constant current source connected between the inverted input terminal and a second power supply terminal, a second transistor having a source connected to a first power supply terminal, a gate connected to the drain of the first transistor, and a drain connected to an output terminal, and a third constant current source connected between the drain of the second transistor and the second power supply terminal. An oscillation circuit includes comparators in which at least one of the comparators is a comparator described above.
    Type: Application
    Filed: June 12, 2019
    Publication date: December 19, 2019
    Inventor: KAORU SAKAGUCHI