Patents by Inventor Kaoru Tachibana

Kaoru Tachibana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220277890
    Abstract: A multilayer coil component includes a multilayer body including a plurality of insulating layers and a coil therein; and first and second outer electrodes electrically connected to the coil. An axial direction of the coil is parallel to a mounting surface of the multilayer coil component. A laminating direction of the multilayer body is perpendicular to the mounting surface. When in a section of a coil conductor extending in the laminating direction, the section being taken along a plane parallel to the mounting surface, a dimension of the coil conductor in a direction parallel to an axis of the coil is a thickness of the coil, and a dimension of the coil conductor in a direction orthogonal to a direction of the thickness of the coil is a width of the coil, a value of the thickness of the coil/the width of the coil is from 1.5 to 4.0.
    Type: Application
    Filed: May 19, 2022
    Publication date: September 1, 2022
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kazuya KOIZUMI, Atsuo HIRUKAWA, Kaoru TACHIBANA
  • Patent number: 10886061
    Abstract: A multilayer electronic component manufacturing method includes forming a multilayer body including a plurality of ceramic layers, and forming a groove by removing a part of a bottom surface of the multilayer body. The method further includes segmenting the multilayer body by dividing the multilayer body into a plurality of chip regions, and forming an outer electrode conductor layer on the bottom surface of the multilayer body after formation of the groove and segmentation.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: January 5, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kaoru Tachibana
  • Patent number: 10886060
    Abstract: A multilayer electronic component manufacturing method includes forming a multilayer body including a plurality of ceramic layers, and forming an outer electrode conductor layer on a bottom surface of the multilayer body. The method further includes forming a groove by removing at least a part of the outer electrode conductor layer in a part of the outer electrode conductor layer and a part of the bottom surface of the multilayer body after the outer electrode conductor layer is formed, and segmenting the multilayer body by dividing the multilayer body into a plurality of chip regions.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: January 5, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kaoru Tachibana
  • Patent number: 10763033
    Abstract: A multilayer coil component includes magnetic layers and inner electrode layers that are alternately laminated on one another. The inner electrode layers are electrically connected to each other to constitute a helical coil conductor. The coil conductor is buried in an element body composed of the magnetic layers. Outer electrodes having folded portions are disposed on both end portions of the element body. The inner electrode layers of the coil conductor have protrusions protruding from both outer edges extending in a length direction of the element body.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: September 1, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kaoru Tachibana, Kouta Nakao
  • Publication number: 20190115143
    Abstract: A multilayer coil component includes magnetic layers and inner electrode layers that are alternately laminated on one another. The inner electrode layers are electrically connected to each other to constitute a helical coil conductor. The coil conductor is buried in an element body composed of the magnetic layers. Outer electrodes having folded portions are disposed on both end portions of the element body. The inner electrode layers of the coil conductor have protrusions protruding from both outer edges extending in a length direction of the element body.
    Type: Application
    Filed: October 15, 2018
    Publication date: April 18, 2019
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kaoru TACHIBANA, Kouta NAKAO
  • Patent number: 10256029
    Abstract: An electronic component includes a multilayer body having a configuration, in which a plurality of insulator layers containing ferrite ceramic are stacked, and a coil having a configuration, in which a plurality of coil conductor layers containing Ag and being disposed on the insulator layers are connected to at least one via hole conductor penetrating the insulator layers in the stacking direction, and having a spiral shape spiraling in the stacking direction. A first pore area ratio of a side gap interposed between an outer circumferential edge of an annular track formed by stacking the plurality of coil conductor layers and an outer edge of the multilayer body, when viewed in the stacking direction, is 9.0% or more and 20.0% or less, and the second pore area ratio of a portion interposed between two coil conductor layers in the stacking direction is 8.0% or less.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: April 9, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Norimichi Onozaki, Kaoru Tachibana, Mitsuru Odahara
  • Publication number: 20180182536
    Abstract: A multilayer electronic component manufacturing method includes forming a multilayer body including a plurality of ceramic layers, and forming a groove by removing a part of a bottom surface of the multilayer body. The method further includes segmenting the multilayer body by dividing the multilayer body into a plurality of chip regions, and forming an outer electrode conductor layer on the bottom surface of the multilayer body after formation of the groove and segmentation.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 28, 2018
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Kaoru TACHIBANA
  • Publication number: 20180182535
    Abstract: A multilayer electronic component manufacturing method includes forming a multilayer body including a plurality of ceramic layers, and forming an outer electrode conductor layer on a bottom surface of the multilayer body. The method further includes forming a groove by removing at least a part of the outer electrode conductor layer in a part of the outer electrode conductor layer and a part of the bottom surface of the multilayer body after the outer electrode conductor layer is formed, and segmenting the multilayer body by dividing the multilayer body into a plurality of chip regions.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 28, 2018
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Kaoru TACHIBANA
  • Publication number: 20160314891
    Abstract: An electronic component includes a multilayer body having a configuration, in which a plurality of insulator layers containing ferrite ceramic are stacked, and a coil having a configuration, in which a plurality of coil conductor layers containing Ag and being disposed on the insulator layers are connected to at least one via hole conductor penetrating the insulator layers in the stacking direction, and having a spiral shape spiraling in the stacking direction. A first pore area ratio of a side gap interposed between an outer circumferential edge of an annular track formed by stacking the plurality of coil conductor layers and an outer edge of the multilayer body, when viewed in the stacking direction, is 9.0% or more and 20.0% or less, and the second pore area ratio of a portion interposed between two coil conductor layers in the stacking direction is 8.0% or less.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 27, 2016
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Norimichi ONOZAKI, Kaoru TACHIBANA, Mitsuru ODAHARA
  • Patent number: 9455082
    Abstract: An electronic component having; a multilayer body including insulating layers stacked on one another; a spiral coil including coil conductors provided on the insulating layers and a first via-hole conductor piercing through at least one of the insulating layers to connect the coil conductors to each other; a parallel conductor provided on one of the insulating layers; and a second via-hole conductor piercing through at least one of the insulating layers to connect the parallel conductor in parallel to one of the coil conductors provided on the insulating layer different from the insulating layer on which the parallel conductor is provided. A portion of the coil conductor not connected in parallel to the parallel conductor at least partly has a greater width than a portion of the coil conductor connected in parallel to the parallel conductor other than a contact point with the second via-hole conductor.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: September 27, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kaoru Tachibana, Hiroki Hashimoto
  • Publication number: 20160042862
    Abstract: An electronic component having; a multilayer body including insulating layers stacked on one another; a spiral coil including coil conductors provided on the insulating layers and a first via-hole conductor piercing through at least one of the insulating layers to connect the coil conductors to each other; a parallel conductor provided on one of the insulating layers; and a second via-hole conductor piercing through at least one of the insulating layers to connect the parallel conductor in parallel to one of the coil conductors provided on the insulating layer different from the insulating layer on which the parallel conductor is provided. A portion of the coil conductor not connected in parallel to the parallel conductor at least partly has a greater width than a portion of the coil conductor connected in parallel to the parallel conductor other than a contact point with the second via-hole conductor.
    Type: Application
    Filed: October 20, 2015
    Publication date: February 11, 2016
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kaoru TACHIBANA, Hiroki HASHIMOTO
  • Patent number: 9142344
    Abstract: An electronic component having a laminate having a plurality of insulator layers. A coil is provided consisting of a plurality of coil conductors that are connected by via-conductors piercing through the insulator layers, the coil winding helically about an axis along a direction of lamination. External electrodes are provided on surfaces of the laminate, in which at least some pairs of the coil conductors that neighbor each other with one of the insulator layers provided therebetween have parallel sections that overlap each other when viewed in the direction of lamination. The parallel sections are connected in parallel by the via-conductors or the external electrodes, and each pair of the coil conductors that neighbor each other with one of the insulator layers provided therebetween do not overlap each other when viewed in the direction of lamination, except for the parallel sections, and connections between the coil conductors and the via-conductors.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: September 22, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kaoru Tachibana, Mitsuru Odahara
  • Publication number: 20140232504
    Abstract: An electronic component having a laminate having a plurality of insulator layers. A coil is provided consisting of a plurality of coil conductors that are connected by via-conductors piercing through the insulator layers, the coil winding helically about an axis along a direction of lamination. External electrodes are provided on surfaces of the laminate, in which at least some pairs of the coil conductors that neighbor each other with one of the insulator layers provided therebetween have parallel sections that overlap each other when viewed in the direction of lamination. The parallel sections are connected in parallel by the via-conductors or the external electrodes, and each pair of the coil conductors that neighbor each other with one of the insulator layers provided therebetween do not overlap each other when viewed in the direction of lamination, except for the parallel sections, and connections between the coil conductors and the via-conductors.
    Type: Application
    Filed: January 9, 2014
    Publication date: August 21, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kaoru TACHIBANA, Mitsuru ODAHARA
  • Patent number: 7172806
    Abstract: A sintered ceramic has a porosity of greater than about 30 percent and less than about 80 percent by volume. Pores are filled with an epoxy resin. A filling factor of the epoxy resin is about 40 percent by volume or more. A monolithic ceramic electronic component having an inner electrode, for example, a chip inductor is manufactured with such a porous sintered ceramic. When a direct current is superimposed, the resulting monolithic ceramic electronic component has a substantially unchanged self-resonant frequency and also has a rate of decrease in impedance of about 50 percent or less at 100 MHz.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: February 6, 2007
    Assignee: Murata Manufacturing Co.
    Inventors: Tomoo Takazawa, Takehiko Otsuki, Toshio Kawabata, Kaoru Tachibana
  • Publication number: 20050013083
    Abstract: A sintered ceramic has a porosity of greater than about 30 percent and less than about 80 percent by volume. Pores are filled with an epoxy resin. A filling factor of the epoxy resin is about 40 percent by volume or more. A monolithic ceramic electronic component having an inner electrode, for example, a chip inductor is manufactured with such a porous sintered ceramic. When a direct current is superimposed, the resulting monolithic ceramic electronic component has a substantially unchanged self-resonant frequency and also has a rate of decrease in impedance of about 50 percent or less at 100 MHz.
    Type: Application
    Filed: June 10, 2004
    Publication date: January 20, 2005
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Tomoo Takazawa, Takehiko Otsuki, Toshio Kawabata, Kaoru Tachibana
  • Patent number: 6762925
    Abstract: A ceramic electronic component includes a ceramic sintered compact containing about 35 to 80 volume percent pores and an electrode provided inside the ceramic sintered compact. The pores are filled with resin or glass. This ceramic electronic component is formed by forming a green compact which includes an electrode therein with a ceramic compound having a ceramic raw material, a binder and a spherical or granular combustible material having adhesiveness to the binder. The green compact is fired to form the ceramic sintered compact including the electrode and containing about 35 to 80 volume percent pores. The pores of the ceramic sintered compact are filled with resin or glass.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: July 13, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Katsuyuki Uchida, Toshio Kawabata, Takehiko Otsuki, Masami Sugitani, Motoi Nishii, Yukio Sakamoto, Kaoru Tachibana
  • Publication number: 20030214793
    Abstract: A ceramic electronic component includes a ceramic sintered compact containing about 35 to 80 volume percent pores and an electrode provided inside the ceramic sintered compact. The pores are filled with resin or glass. This ceramic electronic component is formed by forming a green compact which includes an electrode therein with a ceramic compound comprising a ceramic raw material, a binder and a spherical or granular combustible material having adhesiveness to the binder. The green compact is fired to form the ceramic sintered compact including the electrode and containing about 35 to 80 volume percent pores. The pores of the ceramic sintered compact are filled with resin or glass.
    Type: Application
    Filed: April 1, 2003
    Publication date: November 20, 2003
    Inventors: Katsuyuki Uchida, Toshio Kawabata, Takehiko Otsuki, Masami Sugitani, Motoi Nishii, Yukio Sakamoto, Kaoru Tachibana
  • Patent number: 5848048
    Abstract: An optical disc reproducing apparatus capable of detecting data with a high precision without being affected by a low frequency component of a modulation code, comprising a high-pass filter for cutting off the low frequency component contained in the reproduced signal by a predetermined cut-off frequency, an envelope detecting means for detecting the envelope of said reproduced signal, a digitizing means for digitizing said reproduced signal, a gain controlling means for controlling the gain of said digital signal, a low-pass filter for cutting off the high frequency component contained in said gain-controlled digital signal by said cut-off frequency and generating a feedback signal, and an adding means for adding said reproduced signal and said feedback signal and outputting the same as an added signal to said digitizing means.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: December 8, 1998
    Assignee: Sony Corporation
    Inventor: Kaoru Tachibana
  • Patent number: 5710750
    Abstract: An optical disc device is equipped with a high-pass filter for removing a low-frequency noise in a played-back signal, an adder for adding the output signal of the high-pass filter and a correction signal as a low frequency component lost from the played-back data at the noise removal, a first comparator for binarizing the output signal of the adder, and a low-pass filter, having a frequency characteristic complementary to that of the high-pass filter, for suppressing a high frequency component of the output signal of the first comparator to generate the correction signal. In addition, a second comparator for binarizing the output signal of the adder taking a slice level as a reference and outputting played-back data and a controller for varying the slice level and/or a direct current level of the output signal of the adder so that a duty ratio of the played-back data becomes a prescribed value are provided.
    Type: Grant
    Filed: September 18, 1996
    Date of Patent: January 20, 1998
    Assignee: Sony Corporation
    Inventor: Kaoru Tachibana
  • Patent number: 5233437
    Abstract: A recording/reproduction system performs high precision drop-out processing and compensation in the reproduction mode from a disk-shaped recording medium by using a recording format in which a video signal is divided alternately in units of one horizontal scan line into two channels, and the timing of the recorded video signal on one channel is displaced relative to that of the other channel, so as to record the divided signals on a pair of parallel spiral tracks forming the two channels on the disk. A mean value interpolation circuit is provided in each channel for drop-out compensation, and a portion of a reproduced signal of one channel is compensated by a compensation signal produced by the interpolation circuit of the other channel.
    Type: Grant
    Filed: December 13, 1989
    Date of Patent: August 3, 1993
    Assignee: Sony Corporation
    Inventors: Kaoru Tachibana, Ken Morita, Hiroo Takahashi