Patents by Inventor Kaoru Urata

Kaoru Urata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070255890
    Abstract: There is provided a flash memory apparatus for storing data aggregate having a plurality of types of data in and reproduce the data aggregate from a flash memory via a plurality of ports. The flash memory apparatus includes a plurality of access request units configure to request to write data in one block of the flash memory by aligning a writing position of one block data with a page unit on a data type basis of the flash memory when the data classified by type that are inputted via the ports corresponding to the access request units on the one-to-one basis are stored to reach an amount relative to one block of the flash memory, and an access controller configured to write the data in the flash memory during time division allocated per port based on the requests incited by the respective access request units.
    Type: Application
    Filed: April 4, 2007
    Publication date: November 1, 2007
    Inventors: Kaoru Urata, Masakazu Yoshimoto
  • Publication number: 20070223515
    Abstract: A storage device is provided. The storage device includes a plurality of ports for a first kind of access, a second kind of access having a band-secured access period longer than that of the first kind of access, and other kinds of access; and an access controller. The access controller is configured to prepare a total schedule by connecting a plurality of slot units for the first kind of access having a time frame within a band-secured access period to obtain the band-secured access period within the access period for the second kind of access on a time axis, and to allocate one time slot to one slot unit regarding the ports for the first kind of access and to allocate one time slot to one period of the total schedule regarding the ports for the second kind of access among the plurality of ports.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 27, 2007
    Inventor: Kaoru Urata
  • Patent number: 7266751
    Abstract: In a data recording method and a data recording apparatus relating to the present invention, ECC blocks using 36 product codes are recorded on 12 tracks through scanning operations performed three times. First of all, first sync-blocks each constituted by adding a C1 parity to the data string of video data constituting an internal encoding calculation data stream are sequentially recorded. When the first sync-blocks are completely recorded, second sync-blocks each constituted by adding the C1 parity to the data string of C2 parity constituting the internal encoding calculation data stream are sequentially recorded. By recording the C2 parity at one time in a later stage, the system delay can be minimized.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: September 4, 2007
    Assignee: Sony Corporation
    Inventors: Kaoru Urata, Shoji Kosuge
  • Patent number: 7042665
    Abstract: In an apparatus for reproducing a recorded signal and the like of this invention, two reproducing heads are provided for a single track with their set positions being deviated in the track width direction. A signal selecting unit discriminates a reproducing head whose tracing condition of a target track is appropriate based on an error correction result of a C1 correcting unit and output levels of reproducing heads. A signal obtained by the discriminated reproducing head is supplied to a C2 correcting unit to generate an output signal. Consequently, an off track allowance is increased as compared with a case where the target track is traced with a single reproducing head. At the time of a special reproducing operation or even if a narrow track pitch system is adopted, a recorded signal is reproducible properly.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: May 9, 2006
    Assignee: Sony Corporation
    Inventors: Kaoru Urata, Mikio Kita, Mamoru Mizukami
  • Publication number: 20050262536
    Abstract: A video data reproducing apparatus and a video data transfer system are able to reproduce video data of a range designated by file information from a VTR (video tape recorder) based on the fact that the file information for designating video data of a constant range of video data with high resolution such as a non-compressed HDTV (high-definition television) signal recorded on the VTR and a transfer command for requesting transfer of video data of the range designated by this file information are received from a computer through a LAN (local area network) and they are able to transfer reproduced video data through a high-speed network to the computer.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 24, 2005
    Inventors: Kaoru Urata, Hideki Arai, Masayuki Wada, Yoshiaki Tanaka
  • Patent number: 6966025
    Abstract: A D/A converter has a serial interface. Of the sets of the data representing multiple control signals output from latch circuits, the data representing input data, the data representing strobe signal, and the data representing clock signal are supplied to the D/A converter. A mask circuit is provided in the path supplying the strobe signal. When a parity detection circuit detects a transmission error, the mask circuit masks the strobe signal to be supplied to the D/A converter, thereby preventing the D/A converter from outputting an analog output signal corresponding to the input data.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: November 15, 2005
    Assignee: Sony Corporation
    Inventors: Kaoru Urata, Hirokazu Tanaka
  • Publication number: 20050196133
    Abstract: The present invention relates to a non-tracking VTR apparatus. The data reproducing apparatus is characterized in that, of tracks of the predetermined number serving as the editing unit, tracks of a part of the rear side are set to a pre-writing priority area and the remaining tracks are set to a post-writing priority area, with respect to each recording block reproduced from the pre-writing priority area and which is error-corrected by C1 error correction, it is determined whether or not the reproduced data of the recording block with the same ID as that of the recording block is written in the memory. The reproduced data of the recording block in which the reproduced data was not written is written in the memory and the reproduced data of the recording block in which the reproduced data was written is inhibited from being written in the memory.
    Type: Application
    Filed: January 4, 2005
    Publication date: September 8, 2005
    Applicant: Sony Corporation
    Inventors: Kaoru Urata, Mamoru Mizukami, Masanari Yoshida
  • Publication number: 20050163492
    Abstract: When a recording start executed in a variable-speed recording mode, at ST44 a signal having a variable frame rate is selected on the basis of a validity signal from among image signals having a predetermined output frame rate in which the images having the variable frame rate are contained and stored in a memory. If it is decided at ST46 that a phase difference between a write position and a read position in the memory has reached a recording start level, the stored signal is recorded in a recording medium at ST47. If it is decided at ST48 that the phase difference has decreased to a recording stop level, recording to the recording medium is stopped at ST49. When an end operation is executed at ST51, the signal in the memory is recorded in the recording medium to then end actions. The signals are selected and recorded, thus resulting in a smaller signal quantity. Further, if the variable frame rate is varied, video effects can be confirmed only by reproducing the recorded signals.
    Type: Application
    Filed: April 3, 2003
    Publication date: July 28, 2005
    Inventors: Yoshihito Ueda, Hiromi Hoshino, Tomokiyo Kato, Kaoru Urata, Mikio Kita
  • Publication number: 20040233562
    Abstract: In an apparatus for reproducing recorded signal and the like of this invention, two reproducing heads are provided for a single track with their set positions being deviated in the track width direction. A signal selecting unit discriminates are producing head whose tracing condition of a target track is appropriate based on an error correction result of a C1 correcting unit and output levels of reproducing heads. A signal obtained by the discriminated reproducing head is supplied to a C2 correcting unit to generate an output signal. Consequently, an off track allowance is increased as compared with a case where the target track is traced with a single reproducing head. At the time of special reproducing operation or even if a narrow track pitch system is adopted, a recorded signal is reproducible properly.
    Type: Application
    Filed: March 29, 2004
    Publication date: November 25, 2004
    Inventors: Kaoru Urata, Mikio Kita, Mamoru Mizukami
  • Publication number: 20040234235
    Abstract: In an information-recording apparatus and the like according to the present invention, the recording apparatus records in a magnetic tape, digital information on the left and right frames for three-dimensional display. The digital information is acquired by shooting an object from the left and right at the same time. The recording apparatus comprises a recorder for recording in the magnetic tape the digital information for three-dimensional display with the digital information being alternately arranged in the left and right frames at a speed which is “n” times as high as a speed of recording digital information on one frame for normal display and in units of an error correction configuration and an information recording format, which correspond to the digital information on one frame for the normal display.
    Type: Application
    Filed: March 29, 2004
    Publication date: November 25, 2004
    Inventor: Kaoru Urata
  • Patent number: 6804071
    Abstract: Digital data recording apparatus includes a modulator for modulating a recording clock by a recording data. A reference voltage and a reference current in signal processing are set based on a reference clock having a multiple cycle of the cycle of the recording clock when the reference clock is supplied via a rotary transformer. A demodulator demodulates a modulation signal supplied via the rotary transformer to produce a demodulation signal, from which a recording signal is generated for recording on a recording medium. The demodulator obtains a modulation signal and an inverted modulation signal from which first and second saw-tooth wave signals are produced when the reference current is supplied. A mixer mixes the first and second saw-tooth wave signals, and the demodulation signal is obtained, based on the mixer output and the reference voltage.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: October 12, 2004
    Assignee: Sony Corporation
    Inventors: Mamoru Mizukami, Kaoru Urata
  • Publication number: 20040197085
    Abstract: In a data reproduction method and a data reproduction apparatus in the present invention, video data having a frame frequency of 23.97 Hz is recorded on a tape, and in correspondence with this video data, audio data having a sampling frequency of 48 kHz is also recorded on the tape. In a normal reproduction, video data having a frame frequency of 23.97 Hz is reproduced from the tape. In this case, the rate converter outputs audio data of each field without making any conversion. Contrarily, in a compatibility reproduction, video data having a frame frequency of 25 Hz is reproduced from the tape. In this case, the rate converter outputs the audio data of each field after converting the number of items of sampled data into the number corresponding to the reproduction frame frequency.
    Type: Application
    Filed: March 26, 2004
    Publication date: October 7, 2004
    Inventor: Kaoru Urata
  • Publication number: 20040197077
    Abstract: In an apparatus and a method for reproducing recorded signal related to this invention, a dynamic tracking head having two gaps, which deviate from each other traces a single track. Optimum dynamic tracking control is performed using track ID and a differential between envelope signals, which is a signal reproduced from the two gaps, and DC wobbling error. Thus, it controls the position of a reproducing head to a target track position.
    Type: Application
    Filed: March 22, 2004
    Publication date: October 7, 2004
    Inventors: Kaoru Urata, Hiroshi Saito
  • Publication number: 20040199854
    Abstract: In a data recording method and a data recording apparatus relating to the present invention, ECC blocks using 36 product codes are recorded on 12 tracks through scanning operations performed three times. First of all, first sync-blocks each constituted by adding a C1 parity to the data string of video data constituting an internal encoding calculation data stream are sequentially recorded. When the first sync-blocks are completely recorded, second sync-blocks each constituted by adding the C1 parity to the data string of C2 parity constituting the internal encoding calculation data stream are sequentially recorded. By recording the C2 parity at one time in a later stage, the system delay can be minimized.
    Type: Application
    Filed: April 2, 2004
    Publication date: October 7, 2004
    Inventors: Kaoru Urata, Shoji Kosuge
  • Publication number: 20040197086
    Abstract: In an information-recording apparatus and the like according to the invention, digital information is recorded in a magnetic tape according to a recording format in which two types of sync lengths exist. The recorder records digital information having a first information-recording length and digital information having a second information-recording length, which is shorter than the first information-recording length in the magnetic tape. The recorder records a CTL signal serving as a reference during reproduction of the digital information between a recording portion of the digital information having the first information-recording length and a recording portion of the digital information having the second information-recording length.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 7, 2004
    Inventors: Kaoru Urata, Mikio Kita
  • Publication number: 20030084396
    Abstract: A D/A converter has a serial interface. Of the sets of the data representing multiple control signals output from latch circuits, the data representing input data, the data representing strobe signal, and the data representing clock signal are supplied to the D/A converter. A mask circuit is provided in the path supplying the strobe signal. When a parity detection circuit detects a transmission error, the mask circuit masks the strobe signal to be supplied to the D/A converter, thereby preventing the D/A converter from outputting an analog output signal corresponding to the input data.
    Type: Application
    Filed: September 20, 2002
    Publication date: May 1, 2003
    Inventors: Kaoru Urata, Hirokazu Tanaka
  • Publication number: 20030007267
    Abstract: There is provided a digital data recording apparatus, which can transmit a recording data via a rotary transformer without receiving an influence of a recording data rate and low frequency cut-off, and can perform high-quality digital recording with a simple configuration.
    Type: Application
    Filed: February 11, 2002
    Publication date: January 9, 2003
    Inventors: Mamoru Mizukami, Kaoru Urata
  • Patent number: 6304410
    Abstract: Two playback heads A1 and A2 having the same azimuth &thgr; and having a track width W11 equivalent to about 1.5 times the track width W2 of the recording head are paired to form a pair of heads. These playback heads A1 and A2 paired to form a pair of heads are arranged so as to read one recording track T1 simultaneously in the condition with a gap of about one track pitch TP in the track width direction. Data of all recording tracks are thus read correctly without tracking during playback.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: October 16, 2001
    Assignee: Sony Corporation
    Inventors: Mikio Kita, Kaoru Urata
  • Patent number: 6128358
    Abstract: A bit shift value of a synchronizing signal is detected. That is, after respective hamming distances between data from the first part of the synchronization signal and the respective pre-detects words, which are calculated by hamming distance calculators, are respectively compared with a predetermined value by comparators, the compared results are encoded by an encoder and the results are output as the bit shift value. Such bit shift value may be utilized to shift positions of the synchronizing signals of synchronizing blocks.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: October 3, 2000
    Assignee: Sony Corporation
    Inventor: Kaoru Urata
  • Patent number: 5486956
    Abstract: A digital signal reproducing circuit for reproducing a digital signal recorded on a recording medium, includes: an equalizing circuit for receiving a reproduced RF signal and varying at least one of gain characteristics and phase characteristics thereof with a control signal; a Viterbi decoder for receiving the output signal of the equalizing circuit; and a control unit for generating a control signal for the equalizer, wherein the control unit is adapted to control the equalizer so as to minimize a metric increasing amount of the Viterbi decoder.
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: January 23, 1996
    Assignee: Sony Corporation
    Inventor: Kaoru Urata