Patents by Inventor Karel Ptacek
Karel Ptacek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9954523Abstract: An illustrative integrated circuit configured for galvanically isolated signaling includes a receiver having: a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module responsively presenting an impedance that varies based on a magnitude of the differential signal; a biasing module that converts the detector module impedance to a response signal; and a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal.Type: GrantFiled: October 18, 2016Date of Patent: April 24, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Richard Scott Burton, Karel Ptacek
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Publication number: 20180109257Abstract: An illustrative embodiment of an integrated circuit configured for galvanically isolated signaling includes a transfer conductor carrying a modulated carrier signal. A floating transfer loop is electromagnetically coupled to the transfer conductor to receive the modulated carrier signal. The floating transfer loop includes a primary of a step-up transformer. A receiver is coupled to a secondary of the step-up transformer to receive the modulated carrier signal in an amplified, differential fashion, and to demodulate the modulated carrier signal to obtain a digital receive signal.Type: ApplicationFiled: October 23, 2017Publication date: April 19, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Richard Scott BURTON, Karel PTACEK
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Publication number: 20180108621Abstract: Coupled resonators for galvanically isolated signaling between integrated circuit modules. An illustrative multi-module integrated circuit comprises: a transmitter in a first module, the transmitter providing a modulated carrier signal; a receiver in a second module demodulating the modulated carrier signal; and a galvanically isolated signaling path that includes: a first integrated resonator in the first module and a second integrated resonator in the second module, the first and second integrated resonators being resonantly coupled to convey the modulated carrier signal from the transmitter to the receiver.Type: ApplicationFiled: October 18, 2016Publication date: April 19, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Richard Scott BURTON, Karel PTACEK
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Publication number: 20180109256Abstract: An illustrative integrated circuit configured for galvanically isolated signaling includes a receiver having: a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module responsively presenting an impedance that varies based on a magnitude of the differential signal; a biasing module that converts the detector module impedance to a response signal; and a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal.Type: ApplicationFiled: October 18, 2016Publication date: April 19, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Richard Scott BURTON, Karel PTACEK
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Publication number: 20180054132Abstract: A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.Type: ApplicationFiled: November 3, 2017Publication date: February 22, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Karel PTACEK, Tomas TICHY
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Publication number: 20180026629Abstract: An output driver includes a switching device having a first node coupled to a gate of a power switch and pulling down a voltage level of the gate of the power switch to prevent a premature turn-on of the power switch. A pull-down circuit is coupled to the switching device and keeping the switching device from being turned on to prevent the premature turn-on of the power switch.Type: ApplicationFiled: July 20, 2016Publication date: January 25, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Karel PTACEK
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Patent number: 9837916Abstract: A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.Type: GrantFiled: July 6, 2016Date of Patent: December 5, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Karel Ptacek, Tomas Tichy
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Publication number: 20170317598Abstract: A power conversion circuit including an SR MOSFET is provided. A minimum off-time timer for the SR MOSFET is started. A voltage potential at a first terminal of the SR MOSFET is measured. The SR MOSFET is turned on after a rate of change over time of the voltage potential exceeds a first threshold and before the minimum off-time timer expires.Type: ApplicationFiled: April 29, 2016Publication date: November 2, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Karel PTACEK, Tomas TICHY
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Patent number: 9594099Abstract: A circuit and method for detecting a brown-out condition and providing a feed-forward transfer function in a power supply circuit. A comparison circuit is coupled to a delay element through a latch. A second delay element is connected between the first delay element and an input of the latch. The output of the first delay element is connected to a clamping circuit via a logic circuit. A first voltage is compared with a reference voltage to generate a comparison voltage, which is transmitted through the latch and the first delay element. The comparison voltage is monitored at an output of the first delay element. A brown-out condition occurs if the comparison voltage being monitored at the output of the first delay element results from the first voltage being less than the reference voltage.Type: GrantFiled: July 21, 2014Date of Patent: March 14, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Joel Turchi, Karel Ptacek, Radim Mlcousek
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Publication number: 20160204701Abstract: A switched mode power supply, in some embodiments, comprises a synchronous rectification transistor switch including a gate, and it further comprises an output driver coupled to the gate and providing a driving signal to the gate. The driving signal is determined based on a dynamically controllable clamp signal and a prior driving signal.Type: ApplicationFiled: January 14, 2015Publication date: July 14, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Karel PTACEK, Tomas TICHY
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Publication number: 20150318790Abstract: A method and synchronous rectifier controller uses minimum off and on time blanking to avoid switching the switching transistor at incorrect times responsive to transients in the current sense signal. The minimum off time timer is commenced only when the current sense signal is above a reset threshold, and is reset when the current sense voltage falls below the reset threshold. Resetting the minimum off time timer in this manner avoids false starts of the minimum off time timer due to transients and allows the SRC to properly synchronize with the conduction and blocking phases of rectifier operation.Type: ApplicationFiled: April 30, 2014Publication date: November 5, 2015Applicant: Semiconductor Components Industries, LLCInventors: TOMAS TICHY, KAREL PTACEK
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Publication number: 20150287774Abstract: In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, a method includes forming a first electrically conductive structure over a first portion of the first layer of dielectric material and forming a second electrically conductive structure over a second portion of the first layer of dielectric material. A second layer of dielectric material is formed over the first electrically conductive structure and a third electrically conductive structure over the second layer of dielectric material, wherein the third electrically conductive structure is over portions of the first and second electrically conductive structures.Type: ApplicationFiled: March 20, 2015Publication date: October 8, 2015Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Richard Scott Burton, Karel Ptacek
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Patent number: 9013898Abstract: In one form, a synchronous rectifier controller includes a drive clamp adjust terminal, a drive terminal, a clamp voltage generator circuit coupled to the drive clamp adjust terminal for measuring a signal at the drive clamp adjust terminal and providing a clamp voltage having a value determined by the signal, and a driver for providing a drive signal to the drive terminal at a voltage related to the clamp voltage during an active period of the drive signal. In an alternate form a power converter includes a rectifier transistor having a first current electrode, a control electrode for receiving a drive signal, and a second current electrode, and a synchronous rectifier controller having a first terminal coupled to the control electrode of the rectifier transistor for providing the drive signal alternately in an active state and an inactive state.Type: GrantFiled: September 21, 2012Date of Patent: April 21, 2015Assignee: Semiconductor Components Industries, LLCInventors: Karel Ptacek, Roman Stuler
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Publication number: 20150028916Abstract: A circuit and method for detecting a brown-out condition and providing a feed-forward transfer function in a power supply circuit. A comparison circuit is coupled to a delay element through a latch. A second delay element is connected between the first delay element and an input of the latch. The output of the first delay element is connected to a clamping circuit via a logic circuit. A first voltage is compared with a reference voltage to generate a comparison voltage, which is transmitted through the latch and the first delay element. The comparison voltage is monitored at an output of the first delay element. A brown-out condition occurs if the comparison voltage being monitored at the output of the first delay element results from the first voltage being less than the reference voltage.Type: ApplicationFiled: July 21, 2014Publication date: January 29, 2015Inventors: Joel Turchi, Karel Ptacek, Radim Mlcousek
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Patent number: 8786297Abstract: A circuit and method for detecting a brown-out condition and providing a feed-forward transfer function in a power supply circuit. A comparison circuit is coupled to a delay element through a latch. A second delay element is connected between the first delay element and an input of the latch. The output of the first delay element is connected to a clamping circuit via a logic circuit. A first voltage is compared with a reference voltage to generate a comparison voltage, which is transmitted through the latch and the first delay element. The comparison voltage is monitored at an output of the first delay element. A brown-out condition occurs if the comparison voltage being monitored at the output of the first delay element results from the first voltage being less than the reference voltage.Type: GrantFiled: April 28, 2009Date of Patent: July 22, 2014Assignee: Semiconductor Components Industries, LLCInventors: Joel Turchi, Karel Ptacek, Radim Mlcousek
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Patent number: 8710804Abstract: In accordance with an embodiment, a power supply may include a filter stage coupled to an input terminal of a discharge circuit and a supply capacitor coupled to an output terminal of the discharge circuit. In accordance with another embodiment, a method for discharging at least one capacitor includes discharging the at least one capacitor in response to a signal at the input terminal of the discharge circuit being different from a reference signal.Type: GrantFiled: July 25, 2011Date of Patent: April 29, 2014Assignee: Semiconductor Components Industries, LLCInventors: Karel Ptacek, Juan Carlos Pastrana, Jiri Bubla, Jaromir Uherek
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Patent number: 8711582Abstract: A circuit and method for compensating for parasitic elements of a transistor. A transistor, a controller, and a compensation element are mounted to a printed circuit board. The transistor includes parasitic drain and source inductors. The compensation element may be a discrete inductor that has an inductance value equal to about the sum of the inductance values of the parasitic drain and source inductors. The magnitudes of the compensation voltage and the sum of the voltages across the parasitic drain and source inductances are substantially equal. Thus, the compensation voltage developed across the compensation inductor is used to adjust a reference voltage within the controller. A drain-to-source voltage is applied to one input of a comparator within the controller and the adjusted reference voltage is applied to another input of the comparator. An output signal of the comparator is input to drive circuitry that drives a gate of the transistor.Type: GrantFiled: March 31, 2009Date of Patent: April 29, 2014Assignee: Semiconductor Components Industries, LLCInventors: Roman Stuler, Karel Ptacek
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Publication number: 20140085952Abstract: In one form, a synchronous rectifier controller includes a drive clamp adjust terminal, a drive terminal, a clamp voltage generator circuit coupled to the drive clamp adjust terminal for measuring a signal at the drive clamp adjust terminal and providing a clamp voltage having a value determined by the signal, and a driver for providing a drive signal to the drive terminal at a voltage related to the clamp voltage during an active period of the drive signal. In an alternate form a power converter includes a rectifier transistor having a first current electrode, a control electrode for receiving a drive signal, and a second current electrode, and a synchronous rectifier controller having a first terminal coupled to the control electrode of the rectifier transistor for providing the drive signal alternately in an active state and an inactive state.Type: ApplicationFiled: September 21, 2012Publication date: March 27, 2014Inventors: Karel Ptacek, Roman Stuler
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Publication number: 20130027999Abstract: In accordance with an embodiment, a power supply may include a filter stage coupled to an input terminal of a discharge circuit and a supply capacitor coupled to an output terminal of the discharge circuit. In accordance with another embodiment, a method for discharging at least one capacitor includes discharging the at least one capacitor in response to a signal at the input terminal of the discharge circuit being different from a reference signal.Type: ApplicationFiled: July 25, 2011Publication date: January 31, 2013Inventors: Karel Ptacek, Juan Carlos Pastrana, Jiri Bubla, Jaromir Uherek
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Patent number: 7956651Abstract: A method and circuit for detecting a current and compensating for an offset voltage. The circuit includes two comparators where one of the comparators has two input terminals and the other comparator has three input terminals. An input terminal of each of the two comparators are commonly connected together, the other input terminal of the two-input comparator is coupled for receiving a first reference voltage, and a second input terminal of the three-input comparator is coupled for receiving a second reference voltage. During a first portion of the period of a sense signal the two comparators operate in a sensing mode and during a second portion of the period of the sense signal the comparator having the three input terminals operate in a current nullification mode or an offset voltage compensation mode. An offset compensation signal is generated during the second portion of the sense signal.Type: GrantFiled: September 10, 2009Date of Patent: June 7, 2011Assignee: Semiconductor Components Industries, LLCInventors: Karel Ptacek, Roman Stuler, Frantisek Sukup