Abstract: A transversal filter has at least one analog shift register which includes a number of parallel inputs and one series output. A further number of individual, predeterminable evaluator circuits are provided, each evaluator circuit having at least one signal input for the input of the signal to be filtered and at least one output, and each evaluator circuit comprises a pair of capacitors arranged on a surface of a substrate. The substrate has at least one substrate terminal and comprises doped semiconductor material which carries a first insulating layer or blocking layer capacitor which contacts an oppositely doped zone located on the surface of the substrate and which is provided with a terminal contact. A second insulating layer or blocking layer capacitor is arranged beside the first capacitor, the second capacitor connectible, via a switching element, to an associated parallel input.

Abstract: A transversal filter with a charge shift device is disclosed for realizing a given filter function. The charge shift device includes a substrate of doped semiconductor material having arranged on one surface thereof a series of shift elements, each shift element having a plurality of capacitor elements in correspondence to the number of shift pulse sequence lines employed with the charge shift device. A serial input is provided for the filter to which an input signal is connected. Capacitor elements connected to one of the shift pulse sequence lines have non-reactive amplifying output units connected thereto. At least one of the capacitor elements connected to at least one of the other shift pulse sequence lines has an additional non-reactive amplifying unit connected thereto. All of the non-reactive amplifying units also connect with an output of the filter.

Abstract: In an illustrated embodiment, at least one analog shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. According to the present teaching, a considerably lesser space requirement is realized by operating the filter so that for every consecutive scanned value of the signal each evaluating circuit is read in twice consecutively with a charge shift between such read-in processes, no charge shift being effected between the second read-in process and the first read-in process for the next scanned signal value. Read-in of the held signal may be effected more than twice.

Abstract: In illustrated embodiments, at least one analogue shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. The capacity of every storage position of the shift register is at least such that it is always able to accommodate the maximum quantity of charge supplied by the preceding storage position, and when the storage position has a parallel input, can additionally accommodate the maximum quantities of charge supplied by the associated evaluating circuit (s). Various modifications are disclosed for reducing the space requirement of a transversal filter when implemented, for example, as a CCD.

Abstract: A buried channel charge coupled device (BCCD) is operated by an improved process in a two-phase operation. The device includes a buried channel in a semiconductor substrate below an insulating layer on a surface of the substrate and below the electrodes of the device. The electrodes are divided into first and second electrodes with the first electrodes spaced apart in a first level of the insulating layer and electrically insulated from the semiconductor substrate and the second electrodes spaced apart and carried by the insulating layer in a second level and arranged over the interspaces between the first electrodes. Each of the second electrodes is electrically connected to an adjacent first electrode.

Abstract: An opto-electronic sensor has a light-permeable electrically insulating layer arranged on a thin layer of doped semiconductor material having at least one connection contact to form a charge-coupled transmission device including at least one row of electrodes carried on the light-permeable, electrically insulating layer, the electrodes being separated from one another by gaps. The entire rear surface of the thin layer of doped semiconductor material carries at least one light-permeable, electrically insulating layer which, over the entire area thereof, carries a rear electrode consisting of light-permeable, electrically conductive material.

Abstract: An information memory for storing information in the form of electric charge carriers has at least one dynamic storage element which is arranged upon a surface of at least one substrate made of semiconductor material and doped with a given basic type doping. The substrate connection is included and the memory comprises at least one MIS capacitor. Upon the substrate surface at least one electrically insulating layer is present which carries at least one capacitor electrode. The dynamic storage element comprises the MIS capacitor or an adjacent arrangement of several MIS capacitors, separated from one another by, at the most, narrow distances and comprises at least one contact area at the substrate surface which is provided with an externally accessible ohmic terminal contact, and which contacts at least the margin of the MIS capacitor or t least one of the MIS capacitors, nd which contains material having the basic type of doping.

Abstract: An arrangement for generating pulse trains for charged-coupled circuits employs a plurality of series-connected master-slave JK flip-flop circuits in which a Q output of a flip-flop circuit is connected to a J input of the following flip-flop circuit and in which a terminal for obtaining the generated timing pulses is provided at each Q output of a flip-flop circuit. A pulse train input for providing timing pulses to the flip-flop circuits and for each flip-flop circuit an NAND gate is provided whose output is connected to the clear input of the flip-flop circuit. One input of the NAND gate is connected to the timing pulse input line and another input is connected to a Q output of the following flip-flop circuit, except for the last flip-flop circuit in which the other input of the NAND gate associated therewith is connected to the Q output of the first flip-flop circuit.