Abstract: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first sidewall and an opposite second sidewall. A first insulating material layer is disposed over an upper portion of the first sidewall, and a conductive material disposed within the trench. An air gap is disposed between the conductive material and the semiconductive layer.

Abstract: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first sidewall and an opposite second sidewall. A first insulating material layer is disposed over an upper portion of the first sidewall, and a conductive material disposed within the trench. An air gap is disposed between the conductive material and the semiconductive layer.

Abstract: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

Abstract: An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.

Abstract: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

Abstract: An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the semiconductor body and a channel is disposed in the semiconductor body and extends through the region of the first conductivity type. A semiconductor of a second conductivity type is disposed within the channel adjacent the region of the first conductivity type such that the region of the first conductivity type and the semiconductor of the second conductivity type form a diode. At least one of the region of the first conductivity type and the semiconductor of the second conductivity type is electrically coupled to the structure to be protected.

Abstract: A field effect transistor (FET) and fabrication method are disclosed. The FET includes a drift region formed in a substrate. A trench adjoins the drift region and contains at least one control region and a connection region. An inversion channel region is isolated from the control region. A portion of the trench extends to the same depth as a second trench that insulates the FET from other components formed in the substrate. Insulating material is disposed between the trench below the control region and the control region. An insulating layer insulates the FET from the substrate. The trench and/or the connection region may extend into the insulating layer or may be isolated from the insulating layer via the drift region.

Abstract: In a method for manufacturing a micromechanical device having a region for forming an integrated circuit, at first a first layer is produced on a deeper-lying part in the substrate. Subsequently, a membrane layer is produced on the first layer and at least one channel completely penetrating the membrane layer is introduced in the membrane layer. After that, a region of the first layer below the membrane layer is removed to form a cavity. Finally, the channel is sealed and a planar surface is formed.

Abstract: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

Abstract: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

Abstract: An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.

Abstract: An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.

Abstract: An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the semiconductor body and a channel is disposed in the semiconductor body and extends through the region of the first conductivity type. A semiconductor of a second conductivity type is disposed within the channel adjacent the region of the first conductivity type such that the region of the first conductivity type and the semiconductor of the second conductivity type form a diode. At least one of the region of the first conductivity type and the semiconductor of the second conductivity type is electrically coupled to the structure to be protected.

Abstract: A method for producing an integrated PIN photodiode. The PIN photodiode contains a doped region of a first conduction type near the substrate and a doped region that is remote from the substrate. The doped region that is remote from the substrate has a different construction type than the region near the substrate. In addition, an intermediate region provided that is a range between the doped region remote from the substrate and the doped region near the substrate. The intermediate region is undoped or provided with weak doping.

Abstract: An integrated circuit arrangement (10) containing a pin photodiode (14) and a highly doped connection region (62) of a bipolar transistor (58) is explained, inter alia. Skillful control of the method produces an intermediate region (30) of the pin diode (14) with a large depth and without autodoping in a central region.

Abstract: In a method for manufacturing a micromechanical device having a region for forming an integrated circuit, at first a first layer is produced on a deeper-lying part in the substrate. Subsequently, a membrane layer is produced on the first layer and at least one channel completely penetrating the membrane layer is introduced in the membrane layer. After that, a region of the first layer below the membrane layer is removed to form a cavity. Finally, the channel is sealed and a planar surface is formed.

Abstract: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

Abstract: In a method for securing an object against unauthorized use, an interrogation unit (1) transmits an interrogation signal (s) and tests whether a response unit (2), which is to be carried by an authorized user, responds to the interrogation signal with a response signal (r) that contains as information a code authorized for desecuring a security device (3). If so, the security device is desecured. The securing method shall prevent unauthorized persons from establishing a radio link via relay stations between the interrogation unit (1) and the response unit (2) for providing the authorized code via this radio link without being noticed by the authorized user. The securing method prevents the desecuring of the security device (3) if the signal transit time of a signal transmitted as the interrogation signal (s) and received as the response signal (r) by the interrogation unit (1) during a monitoring time interval (t4–t5) is greater than a prescribed value.

Abstract: A coil apparatus includes a coil trace, a semiconductor substrate and a dielectric layer arranged on the semiconductor substrate, at least parts of the coil trace being arranged above a recess in the dielectric layer. The coil apparatus further includes a support apparatus arranged in the recess and connected to the coil trace for mechanically supporting the coil trace. The supporting apparatus is preferably a conductive column that is not removed when the recessed is formed in the dielectric layer.

Abstract: A coil apparatus includes a coil trace, a semiconductor substrate and a dielectric layer arranged on the semiconductor substrate, at least parts of the coil trace being arranged above a recess in the dielectric layer. The coil apparatus further includes a support apparatus arranged in the recess and connected to the coil trace for mechanically supporting the coil trace. The supporting apparatus is preferably a conductive column that is not removed when the recessed is formed in the dielectric layer.