Abstract: A test structure for characterizing an organic photodiode image sensor includes, on a common substrate, a cathode sheet resistance portion; a diode capacitance portion; an organic photodiode sheet resistance portion; a contact resistance portion; a step coverage portion; a quantum efficiency portion; a film adhesion portion; and an inkjet printing portion. The organic photodiode sheet resistance portion includes gate metal sets, each gate metal set including four evenly spaced metal lines terminating in a probe point, wherein the spacing within each gate metal set is progressively increased from a first gate metal set to a last gate metal set, and wherein a spacing between each gate metal set is larger than the spacing within any gate metal set; and an organic photodiode sheet formed over the gate metal sets.

Abstract: Test structures and alignment marks enable accurate measurements of alignment in the active area of an image sensor device. The alignment marks are formed in the active area replacing pixels near the lithographic shot boundaries of the array. Misalignment across the lithographic shots is assessed through the degree of shifting between the alignment patterns. The alignment marks are located in a pixel location of the active area and can measure the actual lithographic shot-to-shot misalignment in the active area, which can be used to make an accurate lithographic alignment. Having such alignment marks allows for a more accurate assessment of the in-line process manufacturing capability as well as a more rapid feedback of in-array drift, which would allow a faster and better control for yield loss.

Abstract: An ESD circuit includes a first metal oxide channel device having a drain coupled to a first node, a source coupled to a second node, and a gate coupled to the first node; a second metal oxide channel device having a source coupled to the first node, a drain coupled to the second node, and a gate coupled to the second node; a first capacitor coupled between the first and second nodes proximate to the first metal oxide channel device; and a second capacitor coupled between the first and second nodes proximate to the second metal oxide channel device. The ESD circuit can further include a third capacitor coupled between the first and second nodes proximate to the first capacitor. The ESD circuit can further include a fourth capacitor coupled between the first and second nodes proximate to the second capacitor.

Abstract: A test structure for characterizing an organic photodiode image sensor includes, on a common substrate, at least one of a cathode sheet resistance portion; a diode capacitance portion; an OPD sheet resistance portion; a contact resistance portion; a step coverage portion; a quantum efficiency portion; a film adhesion portion; and an inkjet printing portion.

Abstract: A method of manufacturing an image sensor device includes providing a substrate; forming a buffer layer on the substrate; forming a metal oxide channel on the buffer layer; forming a gate oxide layer on the buffer layer and the metal oxide channel; forming a gate metal layer on the gate oxide layer; forming a photodiode stack on the gate metal layer; patterning the gate oxide layer and the gate metal layer to form a first portion under the photodiode stack, and a second portion comprising a transistor; forming an interlayer dielectric layer over at least the photodiode stack and the transistor; forming a plurality of vias in the interlayer dielectric layer; and metalizing the vias to form contacts to the image sensor device.

Abstract: A method and apparatus for controlling supply voltage for a successive approximation register analog to digital converter and comparator common mode voltage. The method comprises: measuring a successive approximation register conversion time; comparing the successive approximation register conversion time with a desired conversion time; and if necessary, performing a closed loop adjustment of at least one of the supply and/or comparator common mode voltage. The apparatus consists of a common mode voltage and regulator correction module. The common mode voltage and regulator correction module includes a phase frequency detector, a charge pump and may include a transconductance cell.

Abstract: Various user interfaces and other technologies for seamlessly transitioning between calls of different types can be implemented. The technologies can be implemented to give the impression of a single call that is upgraded from one call type to another. A new application can register so that an appropriate user interface control appears for activation when seamless call transition is possible. Transitioning for third-party applications can thus be supported. Cross-platform implementations can be supported.

Abstract: A method and apparatus for controlling supply voltage for a successive approximation register analog to digital converter and comparator common mode voltage. The method comprises: measuring a successive approximation register conversion time; comparing the successive approximation register conversion time with a desired conversion time; and if necessary, performing a closed loop adjustment of at least one of the supply and/or comparator common mode voltage. The apparatus consists of a common mode voltage and regulator correction module. The common mode voltage and regulator correction module includes a phase frequency detector, a charge pump and may include a transconductance cell.

Abstract: An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a ?VGS current source to generate a second current through a resistor to produce a second voltage V2; a comparator to generate the pulse in response to the first and second voltages; and a circuit to enable the charging and discharging of the capacitor. The use of the distinct current sources (e.g., PTAT and ?VGS) enables the pulse generator to be configured substantially process independent of resistive value. The use of a MOSFET capacitor for the capacitor enables the pulse generator to be made substantially process independent of capacitive value. An additional bandgap current source in parallel with the ?VGS current source reduces the pulse width dependency on temperature.

Abstract: An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a ?VGS current source to generate a second current through a resistor to produce a second voltage V2; a comparator to generate the pulse in response to the first and second voltages; and a circuit to enable the charging and discharging of the capacitor. The use of the distinct current sources (e.g., PTAT and ?VGS) enables the pulse generator to be configured substantially process independent of resistive value. The use of a MOSFET capacitor for the capacitor enables the pulse generator to be made substantially process independent of capacitive value. An additional bandgap current source in parallel with the ?VGS current source reduces the pulse width dependency on temperature.

Abstract: An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a ?VGS current source to generate a second current through a resistor to produce a second voltage V2; a comparator to generate the pulse in response to the first and second voltages; and a circuit to enable the charging and discharging of the capacitor. The use of the distinct current sources (e.g., PTAT and ?VGS) enables the pulse generator to be configured substantially process independent of resistive value. The use of a MOSFET capacitor for the capacitor enables the pulse generator to be made substantially process independent of capacitive value. An additional bandgap current source in parallel with the ?VGS current source reduces the pulse width dependency on temperature.