Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to reduce emissions in guided network environments. An apparatus includes interface circuitry, machine readable instructions, and programmable circuitry to at least one of instantiate or execute the machine readable instructions to collect data from respective network nodes corresponding to a request to access information, predict an emission of accessing the information via the respective network nodes using the data, and select a network path including at least one of the network nodes based on the predicted emission.

Abstract: A method is described. The method includes invoking one of more functions from a set of API functions that expose the current respective cooling states of different, respective cooling devices for different components of a hardware platform. The method includes orchestrating concurrent execution of multiple applications on the hardware platform in view of the current respective cooling states. The method includes, in order to prepare the hardware platform for the concurrent execution of the multiple applications, prior to the concurrent execution of the multiple applications, sending one or more commands to the hardware platform to change a cooling state of at least one of the cooling devices.

Abstract: A method is claimed. The method includes receiving information associated with a software application's workflow. The method includes receiving information that describes a platform's current power consumption state and current thermal state. The method includes selecting platform components to support execution of the workflow. The method includes prior to execution of the workflow upon the selected platform components, estimating a thermal impact to the platform's current thermal state as a consequence of the workflow's execution upon the selected platform components. The method includes determining a change to be made to a thermal cooling system of the platform in response to the estimating and causing the change to be made to the thermal cooling system prior to execution of at least a portion of the workflow on the platform.

Abstract: Methods and systems for mitigating the effects of defects in a quantum processor are provided. A mitigation system includes a quantum processor comprising a plurality of qubits. The system includes a light emitting source that can be tuned to produce light pulses of different wavelengths. The system includes an array of bandpass filters. Each bandpass filter is aligned with a qubit on the quantum processor and has a unique pass band. The system may include a controller configured to receive a selection of a qubit and to tune the light emitting source to emit a light pulse having a wavelength that falls within a range of a bandpass filter that is aligned with the selected qubit. The light pulse is used to scramble an ensemble of strongly coupled two-level system (TLS) in the processor.

Abstract: Methods and systems for mitigating the effects of defects in a quantum processor are provided. A mitigation system includes a quantum processor having multiple qubits. The system includes an array of light emitting sources. Each light emitting source is aligned with a qubit on the quantum processor. The system includes a controller configured to receive a selection of a qubit and to enable a light emitting source from the array of light emitting sources to emit light to the selected qubit. The light is use to scramble strongly coupled two-level systems (TLSs) in the quantum processor.

Abstract: Methods and systems for mitigating the effects of defects in a quantum processor are provided. A mitigation system uses an iterative process of applying light pulses and examining qubit relaxation times to eliminate or minimize two-level system (TLS) interaction with qubits. The system applies a first light pulse to illuminate a quantum processor having one or more qubits. The system receives qubit relaxation times that are measured at different electric field frequencies after applying the first light pulse.

Abstract: Some embodiments include apparatuses and methods forming the apparatuses. One of the apparatuses includes a first transistor including a first channel region, and a charge storage structure separated from the first channel region; a second transistor including a second channel region formed over the charge storage structure; and a data line formed over and contacting the first channel region and the second channel region, the data line including a portion adjacent the first channel region and separated from the first channel region by a dielectric material.

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to store data based on an environmental impact of a storage device. An example apparatus to store data, the apparatus includes programmable circuitry to at least one of instantiate or execute the machine readable instructions to determine a first environmental impact associated with storing the data in a first storage device, determine a second environmental impact associated with storing the data in a second storage device, and cause the data to be stored in one of the first storage device or the second storage device based on the first environmental impact and the second environmental impact.

Abstract: An apparatus is described. The apparatus includes a memory module. The memory module includes a memory. The memory module includes function execution circuitry. The function execution circuitry is configurable to execute a producer function and a consumer function of a multi-function process. The memory module includes an interface to be coupled to a memory controller.

Abstract: An embodiment disclosed herein includes a method of dicing a wafer comprising a plurality of integrated circuits. In an embodiment, the method comprises forming a mask above the semiconductor wafer, and patterning the mask and the semiconductor wafer with a first laser process. The method may further comprise patterning the mask and the semiconductor wafer with a second laser process, where the second laser process is different than the first laser process. In an embodiment, the method may further comprise etching the semiconductor wafer with a plasma etching process to singulate the integrated circuits.

Abstract: Embodiments provide mechanisms to facilitate compute operations for deep neural networks. One embodiment comprises a graphics processing unit comprising one or more multiprocessors, at least one of the one or more multiprocessors including a register file to store a plurality of different types of operands and a plurality of processing cores. The plurality of processing cores includes a first set of processing cores of a first type and a second set of processing cores of a second type. The first set of processing cores are associated with a first memory channel and the second set of processing cores are associated with a second memory channel.

Abstract: The present invention relates to data communication and electrical circuits. More specifically, embodiments of the present invention provide a clock and data recovery (CDR) architecture implementation for high data rate wireline communication links. In an embodiment, a CDR device includes a phase detector, a loop filter, and a fractional-N PLL. The fractional-N PLL generates output clock signal based on output of the loop filter. There are other embodiments as well.

Abstract: Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.

Abstract: A temperature sensor system for an integrated circuit includes at least one sensor configured to generate a sensor signal indicative of a temperature in a respective location of the integrated circuit and a sensing module configured to receive the sensor signal, determine a temperature of the at least one sensor based on the sensor signal, an electrical characteristic of the at least one sensor, and a relationship between the electrical characteristic and the temperature of the at least one sensor, the relationship corresponding to variations in the electrical characteristic at a known calibration temperature, and generate a temperature signal based on the determined temperature.

Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.

Abstract: The present invention relates to data communication and electrical circuits. More specifically, embodiments of the present invention provide a clock and data recovery (CDR) architecture implementation for high data rate wireline communication links. In an embodiment, a CDR device includes a phase detector, a loop filter, and a fractional-N PLL. The fractional-N PLL generates output clock signal based on output of the loop filter. There are other embodiments as well.

Abstract: The present invention relates to integrated circuits. More specifically, embodiments of the present invention provide methods and systems for determining temperatures of an integrated circuit using an one-point calibration technique, where temperature is determined by a single temperature measurement and calculation using known electrical characteristics of the integrated circuit.

Abstract: Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.

Abstract: Methods and apparatuses for etching metal-doped carbon-containing materials are provided herein. Etching methods include using a mixture of an etching gas suitable for etching the carbon component of the metal-doped carbon-containing material and an additive gas suitable for etching the metal component of the metal-doped carbon-containing material and igniting a plasma to selectively remove metal-doped carbon-containing materials relative to underlayers such as silicon oxide, silicon nitride, and silicon, at high temperatures. Apparatuses suitable for etching metal-doped carbon-containing materials are equipped with a high temperature movable pedestal, a plasma source, and a showerhead between a plasma generating region and the substrate.

Abstract: According to examples, an apparatus may include a machine readable medium on which is stored machine readable instructions that may cause a processor to, for each of a plurality of resource setting levels, determine resource usage characteristics and execution times of executed workloads, assign, based on the resource usage characteristics of the executed workloads, each of the executed workloads into one of a plurality of resource bins, determine, for each of the resource bins, an average execution time of the executed workloads in the resource bin, determine a total average execution time of the executed workloads from the determined average execution times, identify a lowest total average execution time of the determined total average execution times, determine the resource setting level corresponding to the identified lowest total average execution time, and tune a resource setting to the determined resource setting level.