Abstract: Methods and apparatuses for etching metal-doped carbon-containing materials are provided herein. Etching methods include using a mixture of an etching gas suitable for etching the carbon component of the metal-doped carbon-containing material and an additive gas suitable for etching the metal component of the metal-doped carbon-containing material and igniting a plasma to selectively remove metal-doped carbon-containing materials relative to underlayers such as silicon oxide, silicon nitride, and silicon, at high temperatures. Apparatuses suitable for etching metal-doped carbon-containing materials are equipped with a high temperature movable pedestal, a plasma source, and a showerhead between a plasma generating region and the substrate.

Abstract: Various embodiments of systems and methods for integrated services for form generation and maintenance on cloud are described herein. The method includes receiving a request for a form-related service from a client. The form-related service may comprise at least one of generating a form, printing the form, extracting one or more form templates, extracting one or more form schemas, and uploading one or more tenant-created form templates onto a cloud template store. The received request is authenticated. Upon a successful authentication, one or more actions may be performed to render an output based upon the request. The output may include one of a form, the one or more form templates, the one or more form schemas, and a notification for successful or unsuccessful uploading of the one or more tenant-created form templates onto the cloud template store. Upon unsuccessful authentication, an error message may be displayed.

Abstract: The present invention is directed to signal processing system and electrical circuits. According to various embodiments, a DLL system includes a delay line provides multiple output signals associated with different clock phases. The delay line may be adjusted using a pair of bias voltages. A phase detector systems generates the bias voltages using the multiple output signals from the delay line. The multiple output signals include signals associated with the first phase, the last phase, and two adjacent phases. There are other embodiments as well.

Abstract: Disclosed is a method to form arbitrarily shaped, uniform, lightweight, thermally insulating and acoustically absorptive automotive components with controllable density, thickness, porosity, and surface integrity. The method is based on natural cellulosic fibers such as those found in cardboard and paper and uses a thermoplastic fiber and particle slurry to form fusible components. The method produces components having the benefit of commercially available thermoformed fiber mats or open-cell extruded foam components with excellent acoustical properties, enhanced thermal insulation, and are light weight, which limits engine inefficiency, and the high cost of such products so as to allow large scale implementation.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for regulating a voltage for a high speed serializer/deserializer (SerDes) device. But it will be recognized that the technique can be used for regulating memory devices (e.g., DDR 4 SDRAM devices, DDR4 register devices, DDR4 controller devices), and other high speed data applications. In various embodiments, phase-interpolator is implemented in conjunction with a delay-lock loop (DLL) and an SR latch, where one or more outputs of the DLL is used by the SR latch. Additionally, such techniques can be used for a variety of applications such as network and/or computer storage systems, computer servers, hand held computing devices, portable computing devices, computer systems, network appliances and/or switches, routers, and gateways, and the like.

Abstract: The present invention is directed to communication systems. More specifically, embodiments of the present invention provide a technique and system thereof for performing eye modulation. Eye modulation is performed at the transmission side of a PAM communication system to compensate for distortion and non-linearity and generate an output waveform. Spacing among eye levels is adjusted by performing symmetric modulation using ? parameter and asymmetric modulation using ? parameter. A correction module measures the output waveform and sends feedback signals to a control module to adjust the ? parameter and the ? parameter. There are other embodiments as well.

Abstract: The present invention is directed to communication systems. More specifically, embodiments of the present invention provide a technique and system thereof for performing eye modulation. Eye modulation is performed at the transmission side of a PAM communication system to compensate for distortion and non-linearity and generate an output waveform. Spacing among eye levels is adjusted by performing symmetric modulation using ? parameter and asymmetric modulation using ? parameter. A correction module measures the output waveform and sends feedback signals to a control module to adjust the ? parameter and the ? parameter. There are other embodiments as well.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for regulating a voltage for a high speed serializer/deserializer (SerDes) device. But it will be recognized that the technique can be used for regulating memory devices (e.g., DDR 4 SDRAM devices, DDR4 register devices, DDR4 controller devices), and other high speed data applications. In various embodiments, phase-interpolator is implemented in conjunction with a delay-lock loop (DLL) and an SR latch, where one or more outputs of the DLL is used by the SR latch. Additionally, such techniques can be used for a variety of applications such as network and/or computer storage systems, computer servers, hand held computing devices, portable computing devices, computer systems, network appliances and/or switches, routers, and gateways, and the like.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for sensing a voltage and/or temperature from an integrated circuit device such as a Serializer/Deserializer (SerDes) integrated circuit device. But it will be recognized that the technique can be used for monitoring other system on chip devices, such as micro-controllers, digital signal processors, microprocessors, networking devices, application specific integrated circuits, and other integrated circuit devices that may desire on-chip temperature and/or voltage sensing capability.

Abstract: The present invention relates to integrated circuits. More specifically, embodiments of the present invention provide methods and systems for determining temperatures of an integrated circuit using an one-point calibration technique, where temperature is determined by a single temperature measurement and calculation using known electrical characteristics of the integrated circuit.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for regulating a voltage for a high speed serializer/deserializer (SerDes) device. But it will be recognized that the technique can be used for regulating memory devices (e.g., DDR 4 SDRAM devices, DDR4 register devices, DDR4 controller devices), and other high speed data applications. In various embodiments, phase-interpolator is implemented in conjunction with a delay-lock loop (DLL) and an SR latch, where one or more outputs of the DLL is used by the SR latch. Additionally, such techniques can be used for a variety of applications such as network and/or computer storage systems, computer servers, hand held computing devices, portable computing devices, computer systems, network appliances and/or switches, routers, and gateways, and the like.

Abstract: The present invention relates to integrated circuits. More specifically, embodiments of the present invention provide methods and systems for determining temperatures of an integrated circuit using an one-point calibration technique, where temperature is determined by a single temperature measurement and calculation using known electrical characteristics of the integrated circuit.

Abstract: The present invention is directed to signal processing system and electrical circuits. According to various embodiments, a DLL system includes a delay line provides multiple output signals associated with different clock phases. The delay line may be adjusted using a pair of bias voltages. A phase detector systems generates the bias voltages using the multiple output signals from the delay line. The multiple output signals include signals associated with the first phase, the last phase, and two adjacent phases. There are other embodiments as well.

Abstract: The present invention is directed to communication systems. More specifically, embodiments of the present invention provide a technique and system thereof for performing eye modulation. Eye modulation is performed at the transmission side of a PAM communication system to compensate for distortion and non-linearity and generate an output waveform. Spacing among eye levels is adjusted by performing symmetric modulation using ? parameter and asymmetric modulation using ? parameter. A correction module measures the output waveform and sends feedback signals to a control module to adjust the ? parameter and the ? parameter. There are other embodiments as well.

Abstract: Various embodiments of systems and methods for unified configuration for cloud integration are described herein. In an aspect, the method includes rendering a unified configuration interface within a cloud application for performing cloud integration. The unified configuration interface includes a first widget to configure an external system for integration with the cloud application and a second widget to configure an integration flow (iflow) between the external system and the cloud application. The iflow defines data flow between the configured external system and the cloud application. Subsequent to receiving a confirmation of the selected iflow, integrating the external system with the cloud application to share data in the cloud.

Abstract: The present invention is directed to signal processing system and electrical circuits. According to various embodiments, a DLL system includes a delay line provides multiple output signals associated with different clock phases. The delay line may be adjusted using a pair of bias voltages. A phase detector systems generates the bias voltages using the multiple output signals from the delay line. The multiple output signals include signals associated with the first phase, the last phase, and two adjacent phases. There are other embodiments as well.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for sensing a voltage and/or temperature from an integrated circuit device such as a Serializer/Deserializer (SerDes) integrated circuit device. But it will be recognized that the technique can be used for monitoring other system on chip devices, such as micro-controllers, digital signal processors, microprocessors, networking devices, application specific integrated circuits, and other integrated circuit devices that may desire on-chip temperature and/or voltage sensing capability.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for sensing a voltage and/or temperature from an integrated circuit device such as a Serializer/Deserializer (SerDes) integrated circuit device. But it will be recognized that the technique can be used for monitoring other system on chip devices, such as micro-controllers, digital signal processors, microprocessors, networking devices, application specific integrated circuits, and other integrated circuit devices that may desire on-chip temperature and/or voltage sensing capability.

Abstract: A phase interpolator (PI) is provided to adjust the phase of a clock such that the phase is aligned to an incoming data pattern from a data stream. The data can be captured from a device such as a flip-flop or the like. The present technique uses a PI (digital to phase) and a digital state machine in a feedback loop to set the correct digital code to the PI inputs to achieve an appropriate clock phase. Of course, there can be variations.

Abstract: The voltage regulator device has a wide band amplifier having an input reference voltage, Vref and an input feedback voltage, Vfbk. The device has a source follower coupled to the wide band amplifier, the source follower coupled to an output of the wide band amplifier. The device has a VDD source, a regulator output, and a current source coupled to the source follower and the VDD source. The device has a low frequency path comprising a first transistor. The first transistor has a first gate, a first source, and a first drain. The first source is coupled to the VDD source. The first gate is coupled to a slow node, and the first drain is coupled to the regulator output. The low frequency path comprises a RC network, which has a capacitor, a resistor, and the slow node configured between the resistor and the capacitor. The device has a high frequency path comprising a second transistor. The second transistor has a second gate, a second source, and a second drain. The second source is coupled to the VDD source.