Patents by Inventor Katie Lutker-Lee

Katie Lutker-Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220037152
    Abstract: Improved methods are provided for transferring a photoresist pattern onto one or more underlying layers. In the disclosed embodiments, etch selectivity between a photoresist layer and one or more underlying layers is improved by pre-treating the underlying layer(s) with a plasma before the photoresist layer is deposited and patterned to form a photoresist pattern. The plasma modifies the underlying layer(s) by implanting ions into the underlying layer(s) to form a modified layer. When the modified layer is subsequently etched to transfer the photoresist pattern onto the modified layer, the presence of ions within the modified layer increases the etch rate of the modified layer, compared to the etch rate that the underlying layer(s) would have exhibited without plasma pre-treatment. The increased etch rate of the modified layer improves etch selectivity between the photoresist layer and the modified layer and mitigates defects during the photoresist pattern transfer process.
    Type: Application
    Filed: May 24, 2021
    Publication date: February 3, 2022
    Inventors: Angelique Raley, Qiaowei Lou, Katie Lutker-Lee
  • Publication number: 20210313513
    Abstract: Methods are provided herein for improving oxygen content control in a Metal-Insulator-Metal (MIM) stack of an RERAM cell, while also maintaining throughput. More specifically, a single chamber solution is provided herein for etching and encapsulating the MIM stack of an RERAM cell to control the oxygen content in the memory cell dielectric of the RERAM cell. According to one embodiment, a non-oxygen-containing dielectric encapsulation layer is deposited onto the MIM stack in-situ while the substrate remains within the processing chamber used to etch the MIM stack. By etching the MIM stack and depositing the encapsulation layer within the same processing chamber, the techniques described herein minimize the exposure of the memory cell dielectric to oxygen, while maintaining throughput.
    Type: Application
    Filed: March 24, 2021
    Publication date: October 7, 2021
    Inventors: Katie Lutker-Lee, Angelique Raley, Dina Triyoso
  • Publication number: 20210217614
    Abstract: A method of forming a device includes forming a patterned resist layer over a substrate using an extreme ultraviolet (EUV) lithography process. The method includes forming a mandrel in a plasma processing chamber by selectively depositing a mandrel material over the patterned resist layer, the mandrel including the patterned resist layer and the mandrel material.
    Type: Application
    Filed: January 11, 2021
    Publication date: July 15, 2021
    Inventors: Katie Lutker-Lee, Angelique Raley, Masanobu Honda
  • Publication number: 20210183656
    Abstract: A method of forming a semiconductor device includes depositing a first layer over a substrate and patterning the first layer using an extreme ultraviolet (EUV) lithography process to form a patterned layer and expose portions of the substrate. The method includes, in a plasma processing chamber, generating a first plasma from a gas mixture including SiCl4 and one or more of argon, helium, nitrogen, and hydrogen. The method includes exposing the substrate to the first plasma to deposit a second layer including silicon over the patterned layer.
    Type: Application
    Filed: December 10, 2020
    Publication date: June 17, 2021
    Inventors: Katie Lutker-Lee, Jake Kaminsky, Yu-Hao Tsai, Angelique Raley, Mingmei Wang
  • Publication number: 20210159082
    Abstract: A method of plasma etching includes receiving, by a plasma processing apparatus, a substrate into a processing chamber of the plasma processing apparatus. The substrate includes an etchable layer and a first mask layer overlying the etchable layer. The first mask layer includes a plurality of openings vertically aligned with exposed regions of the etchable layer. The method further includes forming, in the processing chamber, a protective layer over the first mask layer and the exposed regions and etching, in the processing chamber, the protective layer and the exposed regions to remove the protective layer and form recesses in the etchable layer.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 27, 2021
    Inventors: Katie Lutker-Lee, Angelique Raley
  • Publication number: 20200194308
    Abstract: A process flow is utilized for patterning of dual damascene structures in BEOL process steps. Conductor vias are inversely patterned in the form of pillars that are formed before the final dielectric stack is deposited. The final dielectric stack may include a low-k dielectric and the conductor may be ruthenium. The vias may be formed by forming conductor pillars in patterned voids of a sacrificial layer. After the pillars are formed, certain areas between the pillars can then be backfilled with a dielectric, such as for example, a low-k dielectric material. The trench conductor of the dual damascene structure may then be formed. The sacrificial dielectric may then be removed and an additional layer of low-k dielectric material can then be deposited or coated on the structure to provide the final structure having the dual damascene vias and trenches filled with the conductor surrounded by low-k material.
    Type: Application
    Filed: December 3, 2019
    Publication date: June 18, 2020
    Inventors: Angelique D. Raley, Katie Lutker-Lee
  • Patent number: 10304725
    Abstract: Embodiments are disclosed for processing microelectronic workpieces having patterned structures that include ultra-low dielectric constant (k) (ULK) material layers. In particular, embodiments are disclosed that deposit protective layers to protect ULK features during etch processing of patterned structures within substrates for microelectronic workpieces. For certain embodiments, these protective layers are deposited in-situ within the etch chamber.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: May 28, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Xinghua Sun, Takashi Yamamura, Hiroyuki Nagai, Ryuichi Asako, Katie Lutker-Lee
  • Publication number: 20180061700
    Abstract: Embodiments are disclosed for processing microelectronic workpieces having patterned structures that include ultra-low dielectric constant (k) (ULK) material layers. In particular, embodiments are disclosed that deposit protective layers to protect ULK features during etch processing of patterned structures within substrates for microelectronic workpieces. For certain embodiments, these protective layers are deposited in-situ within the etch chamber.
    Type: Application
    Filed: August 1, 2017
    Publication date: March 1, 2018
    Inventors: Xinghua Sun, Takashi Yamamura, Hiroyuki Nagai, Ryuichi Asako, Katie Lutker-Lee
  • Patent number: 9818610
    Abstract: A method for treating a substrate is disclosed. The method includes forming a film stack on the substrate, the film stack comprising an underlying layer, a coating layer disposed above the underlying layer, and a patterning layer disposed above the coating layer. In the method, portions of the patterning layer are removed to form sidewalls of the patterning layer and expose portions of the coating layer, a carbon-containing layer is deposited on the exposed portions of the coating layer and non-sidewall portions of the patterning layer, and the carbon-containing layer and a portion of the coating layer are removed to expose other portions of the coating layer and the patterning layer. The method further includes repeating the deposition and removal of the carbon-coating layer at least until portions of the underlying layer are exposed.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: November 14, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Hiroie Matsumoto, Andrew W. Metz, Yannick Feurprier, Katie Lutker-Lee
  • Publication number: 20170263443
    Abstract: A method for treating a substrate is disclosed. The method includes forming a film stack on the substrate, the film stack comprising an underlying layer, a coating layer disposed above the underlying layer, and a patterning layer disposed above the coating layer. In the method, portions of the patterning layer are removed to form sidewalls of the patterning layer and expose portions of the coating layer, a carbon-containing layer is deposited on the exposed portions of the coating layer and non-sidewall portions of the patterning layer, and the carbon-containing layer and a portion of the coating layer are removed to expose other portions of the coating layer and the patterning layer. The method further includes repeating the deposition and removal of the carbon-coating layer at least until portions of the underlying layer are exposed.
    Type: Application
    Filed: March 14, 2017
    Publication date: September 14, 2017
    Inventors: Hiroie Matsumoto, Andrew W. Metz, Yannick Feurprier, Katie Lutker-Lee
  • Patent number: 9607834
    Abstract: A method for etching an antireflective coating on a substrate is disclosed. The substrate comprises an organic layer, an antireflective coating layer disposed above the organic layer, and a photoresist layer disposed above the antireflective coating layer. The method includes patterning the photoresist layer to expose a non-masked portion of the antireflective coating layer and selectively depositing a carbon-containing layer on the non-masked portions of the antireflective coating layer and on non-sidewall portions of the patterned photoresist layer. The method further includes etching the film stack to remove the carbon-containing layer and to remove a partial thickness of the non-masked portions of the antireflective coating layer without reducing a thickness of the photoresist layer.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: March 28, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Hiroie Matsumoto, Andrew W. Metz, Yannick Feurprier, Katie Lutker-Lee
  • Publication number: 20160293405
    Abstract: A method for etching an antireflective coating on a substrate is disclosed. The substrate comprises an organic layer, an antireflective coating layer disposed above the organic layer, and a photoresist layer disposed above the antireflective coating layer. The method includes patterning the photoresist layer to expose a non-masked portion of the antireflective coating layer and selectively depositing a carbon-containing layer on the non-masked portions of the antireflective coating layer and on non-sidewall portions of the patterned photoresist layer. The method further includes etching the film stack to remove the carbon-containing layer and to remove a partial thickness of the non-masked portions of the antireflective coating layer without reducing a thickness of the photoresist layer.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 6, 2016
    Inventors: Hiroie Matsumoto, Andrew W. Metz, Yannick Feurprier, Katie Lutker-Lee