Patents by Inventor Katsuaki Ookoshi

Katsuaki Ookoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090023301
    Abstract: A method of manufacturing a semiconductor device has supplying a first reactant gas into buffer chamber provided in a reaction chamber of the film deposition apparatus to form a first film over an inner wall surface of the buffer chamber, and supplying a second reactant gas into the reaction chamber to form a second film over a semiconductor substrate.
    Type: Application
    Filed: July 17, 2008
    Publication date: January 22, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Katsuaki OOKOSHI
  • Publication number: 20080299739
    Abstract: According to an aspect of an embodiment, a method of manufacturing a semiconductor device has forming a first insulating film over a rear surface of a plurality of silicon substrates, annealing the plurality of silicon substrates to degas the oxide species in the first insulating film, and oxidizing the surface of the plurality of silicon substrates in a batch process after annealing the silicon substrates.
    Type: Application
    Filed: May 9, 2008
    Publication date: December 4, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kazutaka YOSHIZAWA, Toru ANEZAKI, Katsuaki OOKOSHI, Teruki MORISHITA, Hajime WADA
  • Patent number: 7446394
    Abstract: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing a halogen element. With this semiconductor device, a silicon nitride film which contains the halogen element is formed over the sides of the gate electrode when an SiGe layer is formed over the Si substrate. Therefore, the SiGe layer epitaxial-grows over the Si substrate with high selectivity. As a result, an OFF-state leakage current which flows between, for example, the gate electrode and source/drain regions is suppressed and a manufacturing process suitable for actual mass production is established.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: November 4, 2008
    Assignee: Fujitsu Limited
    Inventors: Masahiro Fukuda, Yosuke Shimamune, Masaaki Koizuka, Katsuaki Ookoshi
  • Publication number: 20080142838
    Abstract: A semiconductor device includes an NMOS transistor and a PMOS transistor. The NMOS transistor includes a channel area formed in a silicon substrate, a gate electrode formed on a gate insulating film in correspondence with the channel area, and a source area and a drain area formed in the silicon substrate having the channel area situated therebetween. The PMOS transistor includes another channel area formed in the silicon substrate, another gate electrode formed on another gate insulating film in correspondence with the other channel area, and another source area and another drain area formed in the silicon substrate having the other channel area situated therebetween. The gate electrode has first sidewall insulating films. The other gate electrode has second sidewall insulating films. The distance between the second sidewall insulating films and the silicon substrate is greater than the distance between the first sidewall insulating films and the silicon substrate.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 19, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyuki Ohta, Katsuaki Ookoshi
  • Publication number: 20070200203
    Abstract: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing a halogen element. With this semiconductor device, a silicon nitride film which contains the halogen element is formed over the sides of the gate electrode when an SiGe layer is formed over the Si substrate. Therefore, the SiGe layer epitaxial-grows over the Si substrate with high selectivity. As a result, an OFF-state leakage current which flows between, for example, the gate electrode and source/drain regions is suppressed and a manufacturing process suitable for actual mass production is established.
    Type: Application
    Filed: March 13, 2007
    Publication date: August 30, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Masahiro Fukuda, Yosuke Shimamune, Masaaki Koizuka, Katsuaki Ookoshi
  • Publication number: 20060278952
    Abstract: There is provided a semiconductor device having a device isolation region of STI structure formed on a silicon substrate so as to define a device region, wherein the device isolation region comprises a device isolation trench formed in the silicon substrate, and a device isolation insulation film filling the device isolation trench. At least a surface part of the device isolation insulation film is formed of an HF-resistant film.
    Type: Application
    Filed: August 25, 2005
    Publication date: December 14, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Toshifumi Mori, Katsuaki Ookoshi, Takashi Watanabe, Hiroyuki Ohta
  • Publication number: 20060121714
    Abstract: Disclosed is a method for manufacturing a semiconductor device provided with a sidewall having a high quality and an excellent shape. The sidewall on a gate electrode side wall is formed using a carbon-containing silicon nitride oxide film. The film can be formed by a CVD method using, as starting materials, BTBAS and oxygen where a BTBAS flow rate/oxygen flow rate ratio is appropriately set and a low film formation temperature is set, for example, at about 530° C. When forming the sidewall using this film, improvement in HF resistance and reduction in fringe capacitance can be realized due to contribution of nitrogen atoms and carbon atoms. Further, when forming this film under low temperature conditions, unnecessary diffusion of impurities introduced into a semiconductor substrate can be suppressed. Thus, transistor characteristics are enhanced and stabilized, so that high performance and high quality in the semiconductor device can be realized.
    Type: Application
    Filed: April 12, 2005
    Publication date: June 8, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyuki Ohta, Katsuaki Ookoshi, Toshifumi Mori
  • Publication number: 20050236679
    Abstract: A SiO2 film is formed on a semiconductor substrate. Then, a SiN film is formed on the SiO2 film. In this event bis (tertiary butyl amino) silane and NH3 are used as a material gas, and the film forming temperature is set to 600° C. or lower.
    Type: Application
    Filed: June 8, 2005
    Publication date: October 27, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Mitsuaki Hori, Hiroyuki Ohta, Katsuaki Ookoshi