Abstract: A data writing operation of a memory card is performed from a first EEPROM chip. Writing commands are given every time data in a memory block unit are completely transferred. Each of four EEPROM chips is performing the writing operation when data of the four EEPROM chips are completely written to the memory card. A systematic side waits for the next data transfer in view of an RDY/BSY signal of the memory card. The data writing operation from the systematic side to each of the four EEPROM chips is sequentially changed by monitoring an RDY/BSY1 signal of the first EEPROM chip. In this construction of the memory card, data can be preferably written and read from the memory card at a high speed.

Abstract: A converting circuit has a memory of a capacity of at least n.times.b.sub.max pixels when b.sub.max is set to the number of valid pixels in a frequency mode providing a largest number of valid pixels for one horizontal period with respect to a plurality of frequency modes. A memory controller has a read only memory (ROM) table for storing an address generating order in advance in the frequency mode of the number b.sub.max of valid pixels. In the memory controller, an address is generated in accordance with address generating order stored in the ROM table when line data in another frequency mode are stored in the memory. Data of n.times.b valid pixels are stored in the memory every n horizontal periods when the number of valid pixels for one horizontal period in the other frequency mode is set to b. In the memory controller, data of invalid pixels are store in the memory at the remaining n.times.b.sub.max -n.times.b addresses. A data mask inhibits data of (b.sub.

Abstract: A digital teleconverter includes a component signal generation circuit, an encoder for obtaining a composite signal from the component signal, an image processing unit and a selector for selecting an image processing mode. The component signal generation circuit generates component signals comprising a luminance signal and color difference signals in response to an object image transmitted from an image pickup element. The encoder converts the component signals transmitted from the component signal generation circuit to a composite signal. The image processing unit performs a digital image processing on the basis of either the component signals or the composite signal. The selector selects either a video signal processed by and transmitted from the image processing unit or an original video signal of the object image.