Patents by Inventor Katsuhiko Shibata

Katsuhiko Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for photo annealing non-single crystalline semiconductor films
    Patent number: 4888305
    Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, just formed semiconductor layer undergoes photo annealing and latent dangling bonds are let appear on the surface and gaps, then neutralizer is introduced to the ambience of the semiconductor. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.
    Type: Grant
    Filed: March 9, 1989
    Date of Patent: December 19, 1989
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
  • Tandem photoelectric conversion device
    Patent number: 4847669
    Abstract: An improved tandem photoelectric conversion device is shown. The device comprises at least two photoelectric conversion semiconductor assemblies. The assembly located behind the other has higher crystallinity then the other, so that light with a long wavelength passing through the front assembly be converted into electricity at the back assembly. In the device, an intrinsic semiconductor layer is formed by an ECR CVD system.
    Type: Grant
    Filed: December 17, 1986
    Date of Patent: July 11, 1989
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayoshi Abe, Susumu Nagayama, Kunio Suzuki, Takeshi Fukada, Mikio Kinka, Katsuhiko Shibata, Masato Susukida
  • Sputtering system for deposition on parallel substrates
    Patent number: 4828668
    Abstract: An improved sputtering system for depositing film on a substrate is disclosed. The system comprises a vacuum chamber, a pair of electrodes with a target inbetween, a cart on which a plurality of substrates are mounted and a transportation mechanism for transporting the cart passing through the deposition space between the electrodes. The substrates are mounted perpendicular to the electric field induced by the pair of electrodes.
    Type: Grant
    Filed: March 9, 1987
    Date of Patent: May 9, 1989
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Katsuhiko Shibata, Hisato Shinohara, Masato Susukida
  • Method for making semiconductor device free from electrical short circuits through a semiconductor layer
    Patent number: 4812415
    Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processing a semiconductor device is shown. According to the invention, gaps produced during the fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result when electrodes are provided on the semiconductor layer.
    Type: Grant
    Filed: August 6, 1987
    Date of Patent: March 14, 1989
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
  • Method for manufacturing photoelectric conversion devices
    Patent number: 4806496
    Abstract: Photoelectric conversion devices are manufactured at high yield by repairing the devices during the final steps of the manufacuturing process. Short current paths resulting from the formation process of semiconductor layers can be eliminated by applying a reverse voltage to the layers, which thus are heated and made insulating. After the elimination of the short current paths, the reverse current no longer passes beyond 15 mA on a reverse voltage of 8 V.
    Type: Grant
    Filed: January 28, 1987
    Date of Patent: February 21, 1989
    Assignee: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Kunio Suzuki, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Mikio Kinka, Takeshi Fukada, Susumu Nagayama, Masayoshi Abe, Shunpei Yamazaki
  • Method for manufacturing a semiconductor device free from current leakage through a semiconductor layer
    Patent number: 4786607
    Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processsing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes.
    Type: Grant
    Filed: September 4, 1987
    Date of Patent: November 22, 1988
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shumpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
  • Semiconductor defects curing method and apparatus
    Patent number: 4725558
    Abstract: An improved semiconductor defects curing method and apparatus are disclosed which is free from current leakage due to pin-holes or other defects. Also an improved method for processing a semiconductor device is shown. According to the invention, the gaps or holes in the semiconductor layer produced in the fabrication process are filled with insulator in advance of deposition of electrodes.
    Type: Grant
    Filed: November 6, 1986
    Date of Patent: February 16, 1988
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
  • Overwrapping film
    Patent number: 4507352
    Abstract: An overwrapping film wherein a plastic base film is coated with a plastic material to form an anchor coat layer, which is, in turn, further coated with ink to form an ink layer thereon, and a metal layer is then deposited on the ink layer through the process of vacuum evaporation. The plastic base film is thermally contracted to produce a tightly-packed configuration, while the evaporated metal layer furnishes a metallic gloss to a printed display pattern provided by the ink layer.
    Type: Grant
    Filed: August 24, 1982
    Date of Patent: March 26, 1985
    Assignee: Sony Corporation
    Inventors: Katsuhiko Shibata, Mitsuyoshi Sato