Patents by Inventor Katsuhisa Nagao

Katsuhisa Nagao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9595584
    Abstract: [Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same. [Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 14, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Katsuhisa Nagao
  • Publication number: 20160379992
    Abstract: A semiconductor device (1) is manufactured which includes a SiC epitaxial layer (28), a plurality of transistor cells (18) that are formed in the SiC epitaxial layer (28) and that are subjected to ON/OFF control by a predetermined control voltage, a gate electrode (19) that faces a channel region (32) of the transistor cells (18) in which a channel is formed when the semiconductor device (1) is in an ON state, a gate metal (44) that is exposed at the topmost surface for electrical connection with the outside: and that is electrically connected to the gate electrode (19) while being physically separated from the gate electrode (19), and a built-in resistor (21) that is made of polysilicon and that is disposed below the gate metal (41) so as to electrically connect the gate metal (44) and the gate electrode (19) together.
    Type: Application
    Filed: November 26, 2014
    Publication date: December 29, 2016
    Applicant: ROHM CO., LTD.
    Inventors: Katsuhisa NAGAO, Noriaki KAWAMOTO
  • Publication number: 20160087046
    Abstract: A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Application
    Filed: December 3, 2015
    Publication date: March 24, 2016
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota NAKAMURA, Katsuhisa NAGAO
  • Patent number: 9224825
    Abstract: The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: December 29, 2015
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura, Katsuhisa Nagao
  • Patent number: 9136378
    Abstract: A semiconductor device includes a first conductive-type semiconductor layer, a second conductive-type body region formed in a surficial portion of the semiconductor layer, a first conductive-type source region formed in a surficial portion of the body region, a gate insulating film provided on the semiconductor layer and containing nitrogen atoms, the gate insulating film including a first portion in contact with the semiconductor layer outside the body region, a second portion in contact with the body region, and a third portion in contact with the source region, and a gate electrode provided on the gate insulating film in an area extending across the semiconductor layer outside the body region, the body region, and the source region. The third portion of the gate insulating film has a thickness greater than the thickness of the first portion and the thickness of the second portion.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 15, 2015
    Assignee: ROHM CO., LTD.
    Inventors: Keiji Okumura, Mineo Miura, Katsuhisa Nagao, Shuhei Mitani
  • Publication number: 20150041828
    Abstract: [Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same. [ Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.
    Type: Application
    Filed: March 11, 2013
    Publication date: February 12, 2015
    Inventor: Katsuhisa Nagao
  • Publication number: 20140014972
    Abstract: The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Application
    Filed: September 18, 2013
    Publication date: January 16, 2014
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota Nakamura, Katsuhisa Nagao
  • Patent number: 8563981
    Abstract: The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: October 22, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Yuki Nakano, Ryota Nakamura, Katsuhisa Nagao
  • Publication number: 20130248981
    Abstract: A semiconductor device includes a first conductive-type semiconductor layer, a second conductive-type body region formed in a surficial portion of the semiconductor layer, a first conductive-type source region formed in a surficial portion of the body region, a gate insulating film provided on the semiconductor layer and containing nitrogen atoms, the gate insulating film including a first portion in contact with the semiconductor layer outside the body region, a second portion in contact with the body region, and a third portion in contact with the source region, and a gate electrode provided on the gate insulating film in an area extending across the semiconductor layer outside the body region, the body region, and the source region. The third portion of the gate insulating film has a thickness greater than the thickness of the first portion and the thickness of the second portion.
    Type: Application
    Filed: September 15, 2011
    Publication date: September 26, 2013
    Applicant: ROHM CO., LTD.
    Inventors: Keiji Okumura, Mineo Miura, Katsuhisa Nagao, Shuhei Mitani
  • Patent number: 8395162
    Abstract: The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: March 12, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Yuki Nakano, Ryota Nakamura, Katsuhisa Nagao
  • Publication number: 20110017998
    Abstract: The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Application
    Filed: July 20, 2010
    Publication date: January 27, 2011
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota Nakamura, Katsuhisa Nagao