Patents by Inventor Katsumi Ishikawa

Katsumi Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090128974
    Abstract: A drive circuit that controls a switching device ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device when short circuit of the switching device is detected. Additionally, an ON-pulse retention command circuit retains the output of the drive circuit ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator that detects the gate terminal voltage of the switching device.
    Type: Application
    Filed: January 23, 2009
    Publication date: May 21, 2009
    Applicant: HITACHI, LTD.
    Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
  • Publication number: 20090116197
    Abstract: A power semiconductor module includes first and second insulating substrates, a power semiconductor device joined directly or through another element to opposite sides of the first and second insulating substrates and first and second heat spreaders joined with joining material having fluidity upon joining so as to put the first and second insulating substrates between the first and second heat spreaders. When the power semiconductor module is fabricated, the first and second insulating substrates are joined to the first and second heat spreaders, respectively, in the state that weight bearing on joining material is reduced by means of resilient member.
    Type: Application
    Filed: October 31, 2008
    Publication date: May 7, 2009
    Inventors: Sunao FUNAKOSHI, Katsumi Ishikawa, Tasao Soga
  • Patent number: 7483250
    Abstract: A drive circuit that controls a switching device ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device when short circuit of the switching device is detected. Additionally, an ON-pulse retention command circuit retains the output of the drive circuit ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator that detects the gate terminal voltage of the switching device.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: January 27, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
  • Publication number: 20080315938
    Abstract: A level shifting circuit, satisfying a requirement of a high tolerated dV/dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of a switching terminal, are obtained differentially and integrated, and, in case these pulse signals equal or exceed stipulated integrated values, are transmitted as regular control signals controlling the on/off state.
    Type: Application
    Filed: September 4, 2008
    Publication date: December 25, 2008
    Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda, Katsunori Suzuki
  • Publication number: 20080284482
    Abstract: A semiconductor circuit for an inverter device, comprising a pulse generator for generating a pulse signal upon receiving the input signal for controlling the high-voltage switching device of the inverter device, a driver circuit for driving the high-voltage switching device, and a signal transfer circuit for transferring the pulse signal generated by the pulse generator to the driver circuit, wherein a wide band-gap semiconductor device is used in the signal transfer circuit
    Type: Application
    Filed: May 16, 2008
    Publication date: November 20, 2008
    Inventor: Katsumi Ishikawa
  • Publication number: 20080265826
    Abstract: A movable member is moved in a preset direction in a linear motor. A characteristic-change position-detecting unit detects a position where the magnetic characteristic of the magnets has abruptly changed. The position detected is used as an origin-setting reference position. A reference position for the absolute position of the magnetic linear encoder is set based on the reference position.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 30, 2008
    Applicant: WAKO GIKEN CO., LTD.
    Inventors: Toshihiko SASAKI, Kazuo WATANABE, Katsumi ISHIKAWA
  • Publication number: 20080265690
    Abstract: A position-data converter and a motor-drive control device are connected. The position-data converter receives two-phase, sine-wave analog signals da and db from two first magnetic detectors, respectively, and converts these signals da and db to position data. On receiving a positioning instruction, the motor-drive control device calculates the value of current, from the current position signal generated by the position-data converter. The permanent magnets incorporated in a linear motor are used as components of a linear scale, as well.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 30, 2008
    Applicant: Wako Giken Co., Ltd.
    Inventors: Toshihiko Sasaki, Kazuo Watanabe, Katsumi Ishikawa
  • Publication number: 20080258252
    Abstract: An object of the present invention is to reduce the conducting loss of an existing conversion circuit while suppressing its noise. The present invention is typically a circuit arrangement includes at least one switching device and a free-wheel diode connected in parallel with the switching device. The free-wheel diode is formed by connecting a silicon PiN diode in parallel with a Schottky barrier diode that uses a semiconductor material having a wider band gap than silicon as a base material. The silicon PiN diode and Schottky barrier diode are separate chips.
    Type: Application
    Filed: February 12, 2008
    Publication date: October 23, 2008
    Inventors: Haruka Shimizu, Katsumi Ishikawa, Masahiro Nagasu, Dai Tsugawa
  • Publication number: 20080224303
    Abstract: A power semiconductor module with its thermal resistance and overall size reduced. Insulating substrates with electrode metal layers disposed thereon are joined to both the surfaces of a power semiconductor chip by using, for example, soldering. Metal layers are disposed also on the reverse surfaces of the insulating substrates and the metal layers are joined to the heat spreaders by using brazing. Heat radiating fins are provided on the heat radiating surface of at least one of the heat spreaders. The heat radiating side of each of the heat spreaders is covered by a casing to form a refrigerant chamber through which refrigerant flows to remove heat transmitted from the semiconductor chip to the heat spreader.
    Type: Application
    Filed: October 17, 2007
    Publication date: September 18, 2008
    Inventors: Sunao Funakoshi, Katsumi Ishikawa, Tasao Soga
  • Publication number: 20080183348
    Abstract: In a conventional hybrid scheme used to mount a rechargeable battery in a motor vehicle, store into the battery the electric power that has been obtained via a regenerative brake, and utilize the power during acceleration of the vehicle, when a temperature rise of the battery due to charging or discharging causes a temperature of the battery to stay outside a defined range, it has been absolutely necessary to stop the battery charge or discharge, and fuel efficiency has decreased. This invention predicts a charge level and temperature of a rechargeable battery from the cruising input/output power requirements calculated from route information and historical records of cruising, prevents a stoppage of the battery by calculating chronological engine output and brake control data for the temperature to stay within a defined range, and hence improves fuel efficiency.
    Type: Application
    Filed: January 16, 2008
    Publication date: July 31, 2008
    Applicant: Hitachi, Ltd.
    Inventors: Hiroshi ARITA, Katsumi ISHIKAWA, Sunao FUNAKOSHI, Masahiro NAGASU
  • Patent number: 7405478
    Abstract: A substrate package structure includes bumps disposed on a surface side of a first substrate and a surface side of a second substrate. The bump at the first substrate and the bump at the second substrate are press-fitted to each other while the one surface of the first substrate and the one surface of the second substrate are confronted to each other, thereby connecting the first and second substrates to each other. The bump at the first substrate is constructed so that the tip portion thereof is designed to have a flat surface, and the bump at the second substrate is constructed so that the tip portion is designed to have a projecting portion narrower than the tip portion of the bump at the first substrate.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: July 29, 2008
    Assignee: DENSO CORPORATION
    Inventors: Katsumi Ishikawa, Hiroshi Takei, Nobuya Makino, Tetsuro Yano
  • Publication number: 20080171216
    Abstract: A magnet which includes ferromagnetic powder to be mainly a mother phase containing iron or cobalt. The ferromagnetic powder is provided with a high-resistance layer which has a resistance higher than or equal to ten times as high as a resistance of the mother phase and a Vickers hardness lower than a Vickers hardness of the mother phase. The high-resistance layer is being formed partially or entirely on the surface of the ferromagnetic powder.
    Type: Application
    Filed: March 18, 2008
    Publication date: July 17, 2008
    Inventors: Matahiro Komuro, Yuichi Satsu, Takao Imagawa, Katsumi Ishikawa, Takeyuki Itabashi
  • Publication number: 20080122497
    Abstract: A subject of the present invention is to reduce noise caused by ringing or the like while reducing turn-on power loss of the element and reverse recovery loss of the diode in a switching circuit of a power semiconductor element to which a SiC diode having small recovery current is connected in parallel. A means for solving the problem is to detect gate voltage and/or collector voltage of the power semiconductor switching element and change gate drive voltage in several stages based on the detected value.
    Type: Application
    Filed: January 24, 2008
    Publication date: May 29, 2008
    Applicant: Hitachi, Ltd.
    Inventors: Katsumi ISHIKAWA, Masahiro Nagasu, Dai Tsugawa
  • Publication number: 20080106320
    Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.
    Type: Application
    Filed: December 21, 2007
    Publication date: May 8, 2008
    Applicant: Hitachi, Ltd.
    Inventors: Katsumi ISHIKAWA, Hideki MIYAZAKI, Koichi SUDA
  • Patent number: 7352184
    Abstract: Eddy current generated around a magnetic circuit in an MRI apparatus is one of the causes of deviation from an ideal magnetic field gradient waveform and causes image distortion, loss of strength, ghost generation, loss of signal, and spectral distortion. An object of the present invention is to suppress the generation of the eddy current. In an MRI apparatus, a ferromagnetic material formed from powder is used in a part of a magnetic circuit: the powder mainly comprising a mother phase containing iron or cobalt and showing ferromagnetism; and a high-resistance layer having a resistance not less than ten times as high as the mother phase and a Vickers hardness lower than that of the mother phase being formed in layers along parts of the surface of the powder on parts or the entire of the surface.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: April 1, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Matahiro Komuro, Yuichi Satsu, Takao Imagawa, Katsumi Ishikawa, Takeyuki Itabashi
  • Publication number: 20080074819
    Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.
    Type: Application
    Filed: November 9, 2007
    Publication date: March 27, 2008
    Applicant: HITACHI, LTD.
    Inventors: Masataka Sasaki, Katsumi Ishikawa, Ryuichi Saito, Koichi Suda, Katsuaki Takahashi
  • Patent number: 7336118
    Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: February 26, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda
  • Patent number: 7295412
    Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: November 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Sasaki, Katsumi Ishikawa, Ryuichi Saito, Koichi Suda, Katsuaki Takahashi
  • Patent number: 7285854
    Abstract: A wire bonding method for bonding a plurality of conducting wires to connect first conductors and second conductors has the following steps. 1) Bonding a first conducting ball on a first first conductor. 2) Bonding a first conducting wire on the first conducting ball, the first conducting wire being connected to a first second conductor. 3) Bonding a second conducting ball on a second first conductor. 4) Bonding a second conducting wire on the second conducting ball, the second conducting wire being connected to a second second conductor. Here, the second first conductor or the second second conductor is the first conducting wire bonded on the first conducting ball.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: October 23, 2007
    Assignee: DENSO Corporation
    Inventors: Katsumi Ishikawa, Nobuya Makino, Hiroshi Takei
  • Publication number: 20070221994
    Abstract: A driver circuit that lowers the dependence of the loss in the wide gap semiconductor device upon the temperature is provided. A gate driver circuit for voltage driven power semiconductor switching device includes a power semiconductor switching device, a driver circuit for supplying a drive signal to a gate terminal of the switching device with reference to an emitter control terminal or a source control terminal of the switching device, and a unit for detecting a temperature of the switching device. The temperature of the power semiconductor switching device is detected, and a gate drive voltage or a gate drive resistance value is changed based on the detected temperature.
    Type: Application
    Filed: January 25, 2007
    Publication date: September 27, 2007
    Inventors: Katsumi Ishikawa, Sunao Funakoshi, Kozo Sakamoto, Hidekatsu Onose