Patents by Inventor Katsumi Kikuchi

Katsumi Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200003653
    Abstract: Provided is an analysis device which enables highly accurate diagnosis of a structure state. An analysis device includes a system identification unit, an input modeling unit, an input generation unit, and a response calculation unit. The system identification unit identifies a model representing time evolution of a structure using a non-Gaussian random process, based on a distribution of response of the structure. The input modeling unit generates a probability model representing a distribution of an input, based on data indicating fluctuation of the input to the structure. The input generation unit generates an input signal for the structure based on the probability model. The response calculation unit random response of vibration occurring in the structure in response to the input signal, based on the model and the input signal.
    Type: Application
    Filed: March 22, 2018
    Publication date: January 2, 2020
    Applicant: NEC Corporation
    Inventors: Soichiro TAKATA, Takahiro KUMURA, Katsumi KIKUCHI
  • Publication number: 20190378181
    Abstract: [Problem] To provide a diagnosis cost output device with which it is possible to obtain a diagnosis cost. [Solution] This diagnosis cost output device is provided with: a detection performance identifying means for identifying a measuring time required for leak detection with respect to a sensor installation spacing, on the basis of information affecting vibration propagation characteristics of a pipe; and an output means for outputting a diagnosis cost with respect to the installation spacing, on the basis of a sensor installation cost and a measuring cost arising as a result of the leakage detection during the measuring time.
    Type: Application
    Filed: March 6, 2018
    Publication date: December 12, 2019
    Applicant: NEC Corporation
    Inventors: Shigeki SHINODA, Katsumi KIKUCHI, Hirofumi INOUE
  • Publication number: 20190368964
    Abstract: To reduce erroneous determinations of detecting a leak, a measurement time determination device is provided with: a degree-of-ease calculation unit configured to calculate degree-of-ease of detecting a leak in piping, based on vibration propagating through the piping or a fluid flowing through the piping when the piping is vibrated; and a determination unit configured to determine a measurement time necessary for detecting the leak, based on the degree-of-ease.
    Type: Application
    Filed: March 1, 2018
    Publication date: December 5, 2019
    Applicant: NEC Corporation
    Inventors: Hirofumi INOUE, Katsumi KIKUCHI, Shigeki SHINODA, Shin TOMINAGA
  • Publication number: 20190154637
    Abstract: To acquire information relating to degradation of a pipe on the basis of information that can be acquired using a simple method. The analysis device according to one embodiment is provided with: a determining unit for determining whether or not the accuracy of a pipe network model based on information that includes a parameter that changes in value in accordance with degradation of a pipe satisfies a predetermined criterion; and a derivation unit for deriving information relating to degradation of the pipe, based on the parameter, if the accuracy satisfies the predetermined criterion.
    Type: Application
    Filed: May 11, 2017
    Publication date: May 23, 2019
    Applicant: NEC Corporation
    Inventors: Manabu KUSUMOTO, Katsumi KIKUCHI, Takahiro KUMURA
  • Publication number: 20180312068
    Abstract: A vehicle includes a vehicle body, a positioning mechanism and an electric power supply unit. The vehicle body is configured to be able to carry a sub-mobility device in which a passenger sits. The sub-mobility device includes an electric power receiving unit. The positioning mechanism is provided in the vehicle body and configured to position the sub-mobility device in the vehicle body at a predetermined location. The electric power supply unit is provided in the vehicle body and configured to supply electric power to the electric power receiving unit of the sub-mobility device positioned at the predetermined location, by contacting or approaching the electric power receiving unit.
    Type: Application
    Filed: April 10, 2018
    Publication date: November 1, 2018
    Inventors: Yuji Aiuchi, Katsumi Kikuchi
  • Publication number: 20180314262
    Abstract: A sub-mobility device charging system for a vehicle is capable of moving while carrying a sub-mobility device in which a passenger sits. The system includes an acquisition unit, a main electric power supply unit and a controller. The acquisition unit acquires a destination or traveling schedule inputted to the sub-mobility device; the main electric power supply unit supplies electric power to the sub-mobility device carried in the vehicle; and the controller controls to supply electric power to the sub-mobility device via the main electric power supply unit. The controller charges the sub-mobility device on a basis of the acquired traveling schedule for the sub-mobility device in the destination, and generates a traveling route to guide the charged sub-mobility device to a stop-off points corresponding to the destination.
    Type: Application
    Filed: April 10, 2018
    Publication date: November 1, 2018
    Inventors: Yuji AIUCHI, Katsumi KIKUCHI
  • Publication number: 20180313654
    Abstract: A vehicle includes an acquisition unit and a position determination unit. The acquisition unit is configured to acquire at least one of conditions including an order of getting out of the vehicle, a possibility of manual driving, and a combination of positions of sub-mobility devices in a vehicle compartment, and the position determination unit configured to determine the positions of the sub-mobility devices in the vehicle compartment, on a basis of a combination of the conditions.
    Type: Application
    Filed: April 10, 2018
    Publication date: November 1, 2018
    Inventors: Yuji AIUCHI, Katsumi KIKUCHI
  • Publication number: 20180314263
    Abstract: A sub-mobility device charging system for a vehicle is capable of moving while carrying a sub-mobility device in which passengers sit. The system includes a main electric power supply unit, a main electric power receiving unit, a main battery, a main electric power supply circuit, and a controller. When external charging is required depending on a total amount of the electric power stored in the main battery of the vehicle and a sub-battery of the sub-mobility device, the controller generates or selects a traveling route to pass through a road or a point where the main electric power receiving unit can be supplied with electric power from the outside of the vehicle.
    Type: Application
    Filed: April 10, 2018
    Publication date: November 1, 2018
    Inventors: Yuji AIUCHI, Katsumi KIKUCHI
  • Publication number: 20150053474
    Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.
    Type: Application
    Filed: November 4, 2014
    Publication date: February 26, 2015
    Applicant: NEC CORPORATION
    Inventors: Yoshiki NAKASHIMA, Shintaro YAMAMICHI, Katsumi KIKUCHI, Kentaro MORI, Hideya MURAI
  • Patent number: 8939112
    Abstract: A buckstay connecting system includes a socket part that is fixed to the horizontal buckstay being separated from a lower end of the vertical buckstay between the lower end of the vertical buckstay and the horizontal buckstay, and an insertion part that is fixed to a lower portion of the vertical buckstay, is inserted into the socket part so as to be able to slide in a vertical direction, inhibits the horizontal buckstay from being inclined, and is allowed to be fastened to the socket part.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: January 27, 2015
    Assignee: IHI Corporation
    Inventor: Katsumi Kikuchi
  • Patent number: 8929090
    Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: January 6, 2015
    Assignee: NEC Corporation
    Inventors: Yoshiki Nakashima, Shintaro Yamamichi, Katsumi Kikuchi, Kentaro Mori, Hideya Murai
  • Patent number: 8872334
    Abstract: In a manufacturing method of a semiconductor device incorporating a semiconductor element in a multilayered wiring structure including a plurality of wiring layers and insulating layers, a semiconductor element is mounted on a silicon support body whose thickness is reduced to a desired thickness and which are equipped with a plurality of through-vias running through in the thickness direction; an insulating layer is formed to embed the semiconductor element; then, a plurality of wiring layers is formed on the opposite surfaces of the silicon support body in connection with the semiconductor element. Thus, it is possible to reduce warping which occurs in proximity to the semiconductor element in manufacturing, thus improving a warping profile in the entirety of a semiconductor device. Additionally, it is possible to prevent semiconductor elements from becoming useless, improve a yield rate, and produce a thin-type semiconductor device with high-density packaging property.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: October 28, 2014
    Assignee: NEC Corporation
    Inventors: Shintaro Yamamichi, Katsumi Kikuchi, Yoshiki Nakashima, Kentaro Mori
  • Patent number: 8810008
    Abstract: A semiconductor element-embedded substrate includes a semiconductor element; a chip component; a peripheral insulating layer covering at least the outer circumferential side surfaces thereof; an upper surface-side wiring line provided on the upper surface side of the substrate; and a lower surface-side wiring line provided on the lower surface side of the substrate. The built-in semiconductor element includes a terminal on the upper surface side thereof, and this terminal is electrically connected to the upper surface-side wiring line. The built-in chip component includes an upper surface-side terminal electrically connected to the upper surface-side wiring line; a lower surface-side terminal electrically connected to the lower surface-side wiring line; and a through-chip via penetrating through the chip component to connect the upper surface-side terminal and the lower surface-side terminal.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: August 19, 2014
    Assignee: NEC Corporation
    Inventors: Kentaro Mori, Shintaro Yamamichi, Hideya Murai, Katsumi Kikuchi, Yoshiki Nakashima, Daisuke Ohshima
  • Patent number: 8766440
    Abstract: A wiring board including a built-in semiconductor element includes the semiconductor element, a peripheral insulating layer covering an outer peripheral side surface of the semiconductor element, an upper surface-side wiring provided on an upper surface side of the wiring board, and a lower surface-side wiring provided on a lower surface side of the wiring board. The semiconductor element includes a first wiring structure layer including a first wiring and a first insulating layer alternately provided on a semiconductor substrate, and a second wiring structure layer including a second wiring and a second insulating layer alternately provided on the first wiring structure layer. The upper surface-side wiring includes a wiring electrically connected to the first wiring via the second wiring. The second wiring is thicker than the first wiring and thinner than the upper surface-side wiring. The second insulating layer is formed of a resin material and is thicker than the first insulating layer.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: July 1, 2014
    Assignee: NEC Corporation
    Inventors: Katsumi Kikuchi, Shintaro Yamamichi, Hideya Murai, Kentaro Mori, Yoshiki Nakashima, Daisuke Ohshima
  • Patent number: 8710639
    Abstract: A wiring substrate in which a semiconductor element is built includes a semiconductor element; a peripheral insulating layer covering at least an outer circumferential side surface of this semiconductor element; and an upper surface-side wiring line provided on the upper surface side of the wiring substrate. The semiconductor element includes an internal terminal electrically connected to the upper surface-side wiring line on the upper surface side of the semiconductor element. This internal terminal includes a first conductive part exposed out of an insulating surface layer of the semiconductor element; an adhesion layer on this first conductive part; and a second conductive part on this adhesion layer.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: April 29, 2014
    Assignee: NEC Corporation
    Inventors: Katsumi Kikuchi, Shintaro Yamamichi, Hideya Murai, Kentaro Mori, Yoshiki Nakashima
  • Patent number: 8710669
    Abstract: A semiconductor device includes a core substrate, and at least one insulating layer and at least one wiring layer that are disposed on a first surface and a second, opposite surface of the substrate. The semiconductor device includes a via disposed in the insulating layer and in the core substrate, and which connects the wiring layers to one another. The semiconductor device includes a semiconductor element mounted on the first surface, forming an electrode terminal that faces up. The semiconductor device includes a connecting portion that penetrates the insulating layer and directly connects the electrode terminal of the semiconductor element and the wiring layer on the first surface. A minimum wiring pitch of this wiring that of any wiring layer on the second surface.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: April 29, 2014
    Assignee: NEC Corporation
    Inventors: Kentaro Mori, Yoshiki Nakashima, Daisuke Ohshima, Katsumi Kikuchi, Shintaro Yamamichi
  • Patent number: D717996
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: November 18, 2014
    Assignee: Panasonic Corporation
    Inventor: Katsumi Kikuchi
  • Patent number: D718900
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: December 2, 2014
    Assignee: Panasonic Corporation
    Inventors: Katsumi Kikuchi, Kensaku Okabe
  • Patent number: D784618
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: April 18, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kyohei Mori, Katsumi Kikuchi
  • Patent number: D784619
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: April 18, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kyohei Mori, Katsumi Kikuchi