Abstract: A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

Abstract: A semiconductor chip including a bump projecting from a surface protective film thereof and a surface interconnection having a smaller height than the bump. The surface interconnection may project from the surface protective film or may be flush with the surface protective film. The surface interconnection may be connected to the bump. The bump may include a peripheral bump configured as surrounding a device formation region of the chip. The peripheral bump may be connected to the ground or a power source.

Abstract: A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

Abstract: Ferroelectric memory includes a hollow formed in a first insulation film. A lower electrode is formed in this hollow by sol-gel method including an application process due to a spin coat method. In this application process, a precursor solution is dripped on a surface of the first insulation film and splashed away due to centrifugal force. Due to this, a first conductive film to being formed has an increased film thickness at portion of the hollow where the precursor solution is ready to correct, or portion to be formed into a lower electrode, and a decreased film thickness at portion other than the hollow. Accordingly, it is satisfactory to etch only the hollow portion when forming a lower electrode by dry-etching the first conductive film.

Abstract: A semiconductor chip having a semiconductor substrate; a surface protective film covering the semiconductor substrate; and an interconnection having a portion exposed on the surface protective film, at least the exposed portion of the interconnection being composed of an oxidation-resistant metal material. The interconnection includes, for example, an internal interconnection at least partly exposed from the surface protective film, and a metal coating film of the oxidation-resistant metal material covering a surface portion of the internal interconnection exposed from the surface protective film. The interconnection may be a surface interconnection of the oxidation-resistant metal material provided on the surface protective film.

Abstract: It is an object of the present invention to provide a device having a crystalline oxide layer of complex compound which can form a crystalline thin film with high orientation. The lower electrode 13 comprises tantalum layer 11, titanate layer 12 and platinum layer 6, and PZT thin film 8 is formed on the lower electrode 13. Since titanate layer 12 is formed on the lower electrode 13, crystallinity of the PZT thin film can be improved. Therefore, the “lift-off” method can be used with to no thermal treatment needed when forming the platinum layer 6.

Abstract: A semiconductor device having a chip-on-chip structure. The device includes a first semiconductor chip having a connecting portion provided on its surface, a second semiconductor chip overlapped with and jointed to the surface of the first semiconductor chip and having a connecting portion provided on its surface opposite to the first semiconductor chip, and a deformable interlinkage for linking the connecting portion in the first semiconductor chip and the connecting portion in the second semiconductor chip together. The interlinkage may includes a connecting projection having flexibility provided in a standing condition on a vertex surface of the connecting portion in at least one of the first semiconductor chip and the second semiconductor chip.

Abstract: A ferroelectric memory device includes a first interlayer film. This first interlayer film has a first contact hole in which a plug is buried by W-CVD. Thereafter, a ferroelectric capacitor, a second interlayer film, etc. are formed on the first interlayer film so that a second contact hole can be formed on the second interlayer film. A second contact hole is formed through the second interlayer film. This second contact hole is filled with a metal interconnection for connection to the plug.

Abstract: Ferroelectric memory includes a hollow formed in a first insulation film. A lower electrode is formed in this hollow by sol-gel method including an application process due to a spin coat method. In this application process, a precursor solution is dripped on a surface of the first insulation film and splashed away due to centrifugal force. Due to this, a first conductive film to being formed has an increased film thickness at portion of the hollow where the precursor solution is ready to correct, or portion to be formed into a lower electrode, and a decreased film thickness at portion other than the hollow. Accordingly, it is satisfactory to etch only the hollow portion when forming a lower electrode by dry-etching the first conductive film.

Abstract: A capacitor using a dielectric film wherein plural capacitor units each including one or two capacitor elements are formed on an insulator upper electrodes of at least two capacitor elements of different capacitors units are electrically connected. Each of the capacitors includes a lower filmy electrode, a dielectric film formed on the lower filmy electrode, and an upper filmy electrode formed on the dielectric film. Since plural capacitor units are suitably connected to have desired characteristics, a great deal of flexibility is realized.

Abstract: A semiconductor storage device and a method for producing the same wherein a source region 2 and a drain region 3 are formed in a semiconductor substrate films 14 and 15 of low dielectric constant are formed respectively on the source region 2 and the drain region 3. A ferroelectric film 7 is formed on a channel region 6 surrounded by the source region 2 and the drain region 3. The ferroelectric film 7 is patterned on the films 14 and 15. According to the present invention, semiconductor material is not damaged during the formation and a dielectric polarization efficiency is increased.

Abstract: A maximum voltage detecting apparatus for measuring the output maximum voltage, such as of an optical sensor, a thermal sensor or a wind sensor, utilizing a ferroelectric substance. A d.c. power source of a reset circuit applies a d.c. voltage to a ferroelectric device to generate a maximum spontaneous polarization, the ferroelectric device including metal electrodes and a PZT ferroelectric substance held therebetween. The output voltage such as from the wind sensor is applied to the ferroelectric device so as to have an opposite polarity. A polarization measuring circuit measures a residual polarization in the ferroelectric device by this output voltage and measures a maximum output voltage value from the residual polarization value.

Abstract: A semiconductor storage device and a method for producing the same wherein a source region 2 and a drain region 3 are formed in a semiconductor substrate. Films 14 and 15 of low dielectric constant are formed respectively on the source region 2 and the drain region 3. A ferroelectric film 7 is formed on a channel region 6 surrounded by the source region 2 and the drain region 3. The ferroelectric film 7 is patterned on the films 14 and 15. According to the present invention, semiconductor material is not damaged during the formation and a dielectric polarization efficiency is increased.

Abstract: A peak voltage detector to measure the peak output voltage of light sensors, heat sensors and the like without the need for a reference voltage. In a ferroelectric element, the ferroelectric body is positioned between PT electrodes. The ferroelectric body has a thickness that progressively varies from one end to the other. A D.C. voltage dependent upon the direct current power supply is applied to generate a maximum spontaneous polarization Pr. The output voltage from light sensors, heat sensors and the like is of a reverse polarity with respect to that of the power supply. The output voltage is applied to the ferroelectric element. Depending on this external voltage, reverse polarization will be generated in either one part, certain parts, or all of the ferroelectric element. By measuring this reverse polarization with the polarization measuring circuit, the peak value of the external voltage is measured.

Abstract: The specification discloses a method and apparatus for depositing an oxide film by ion-beam sputtering in which an oxide film is formed on the surface of a wafer by sputtering particles from a target toward the wafer and supplying ozone adjacent to the wafer to oxidize the particles that are close to the surface of the wafer.

Abstract: A maximum voltage detecting apparatus for detecting the maximum voltage output from a light sensor, a wind force sensor or the like by using ferroelectric capacitors, and a method of producing ferroelectric capacitors. A plurality of ferroelectric capacitor devices each of which is composed of one ferroelectric capacitor or a plurality of ferroelectric capacitors which have approximately the same thickness and which are connected in series and are arranged in an array are connected in parallel so as to provide a ferroelectric unit. A DC voltage is applied to the ferroelectric unit so as to produce spontaneous polarization. An output voltage of a wind force sensor or the like is applied to the ferroelectric unit at the opposite polarity, and whether or not the polarization of each ferroelectric capacitor device is reversed is detected, thereby detecting the maximum value of the external voltage.

Abstract: A device having a ferroelectric film formed on the surface of a semiconductor substrate is manufactured. An oxide film having a window above a channel region is formed on the surface of the semiconductor substrate. The ferroelectric film is formed so as to cover the oxide film and the like. In addition, the surface of the ferroelectric film is flattened by a resist. The resist and the ferroelectric film are then etched back, to expose the oxide film. In this state, an unnecessary portion of the oxide film is selectively removed. If the oxide film is formed into a fine pattern, it is possible to form the ferroelectric film into a fine pattern.