Abstract: A mirror unit 2 includes a mirror device 20 including a base 21 and a movable mirror 22, an optical function member 13, and a fixed mirror 16 that is disposed on a side opposite to the mirror device 20 with respect to the optical function member 13. The mirror device 20 is provided with a light passage portion 24 that constitutes a first portion of an optical path between the beam splitter unit 3 and the fixed mirror 16. The optical function member 13 is provided with a light transmitting portion 14 that constitutes a second portion of the optical path between the beam splitter unit 3 and the fixed mirror 16. A second surface 21b of the base 21 and a third surface 13a of the optical function member 13 are joined to each other.

Abstract: A ultrapure water supply system 10 includes a pure water tank 16 provided vertically below a use point 30, a return pipe 32 through which ultrapure water is returned from the use point 30 to the pure water tank 16, a first pressure regulating valve 40 that is provided at a first position H1 of the return pipe 32 and adjusts a first pressure upstream of the first position H1 and a second pressure regulating valve 42 that is provided at a second position H2 downstream of the first position H1 and vertically below the first position H1 of the return pipe 32 and adjusts a second pressure downstream of the first position H1 and upstream of the second position H2.

Abstract: A battery apparatus according to various aspects of the present invention may operate in conjunction with a power source, such as a battery. The battery apparatus may include a protection IC, a first terminal, a second terminal, and a third terminal. The power source may be selectively coupled to the battery apparatus at the second and third terminals. The power source may be capable of providing a current through the battery apparatus via one of a first current loop and a second current loop.

Abstract: To provide a surgical clip capable of being held by, in particular, a robot arm or other device, thus promoting automation of a procedure. A surgical clip to pull an organ or other body tissue so as to provide an area necessary for an operation includes: a pair of upper and lower holders to hold the organ or other body tissue therebetween; a grip to open and close the holders; an urger to constantly urge the holders in a holding direction; and an engagement portion provided on the grip. The engagement portion comes into engagement with a hole defined in a functional part provided on a medical device that includes any one of a robot, forceps, and an applier. The functional part is configured to open and close so as to perform a holding, incising, or other operation.

Abstract: A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

Abstract: A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

Abstract: A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

Abstract: A calibration circuit may comprise a negative pack terminal, an intermediate node, and a first protection IC coupled to a first transistor. The first transistor may be coupled between the negative pack terminal and the intermediate node. The calibration circuit may comprise a second protection IC coupled in parallel with the first protection IC and further coupled to a second transistor. A power source may be coupled in parallel with the first and second protection ICs, and a current source may be coupled between the negative pack terminal and the intermediate node, wherein the intermediate node is positioned between the first transistor and the second transistor, and the power source is configured to provide a current to the first protection IC through a first current loop.

Abstract: A battery apparatus according to various aspects of the present invention may operate in conjunction with a power source, such as a battery. The battery apparatus may include a protection IC, a first terminal, a second terminal, and a third terminal. The power source may be selectively coupled to the battery apparatus at the second and third terminals. The power source may be capable of providing a current through the battery apparatus via one of a first current loop and a second current loop.

Abstract: A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

Abstract: A calibration circuit according to various aspects of the present invention comprises a battery pack, a protection IC, and a power source. The power source may have a predetermined voltage and may be selectively coupled to the protection IC. The power source may be capable of providing a current to the protection IC through one of a first current loop and a second current loop, wherein the current through the first current loop generates a first voltage across a first and second terminal of the protection IC, and the current through the second current loop generates a second voltage across the first and second terminals that is substantially equal to the voltage of the power source.

Abstract: A method for manufacturing a semiconductor device includes forming a first mask layer having a first opening on an underlying layer; forming a first layer in a space where the underlying layer is selectively removed via the first opening; forming a second mask layer on the first mask layer and the first layer, the second mask layer having a second opening crossing the first opening; and selectively removing the first layer at a portion where the first opening and the second opening cross. At least one of the first and second mask layers having openings including the first or second opening, the openings being arranged in the first mask layer along a first direction, and/or being arranged in the second mask layer along a second direction, the first opening crossing the second opening in the first direction, and the second opening crossing the first opening in the second direction.

Abstract: A calibration circuit according to various aspects of the present invention comprises a battery pack, a protection IC, and a power source. The power source may have a predetermined voltage and may be selectively coupled to the protection IC. The power source may be capable of providing a current to the protection IC through one of a first current loop and a second current loop, wherein the current through the first current loop generates a first voltage across a first and second terminal of the protection IC, and the current through the second current loop generates a second voltage across the first and second terminals that is substantially equal to the voltage of the power source.

Abstract: A calibration circuit may comprise a negative pack terminal, an intermediate node, and a first protection IC coupled to a first transistor. The first transistor may be coupled between the negative pack terminal and the intermediate node. The calibration circuit may comprise a second protection IC coupled in parallel with the first protection IC and further coupled to a second transistor. A power source may be coupled in parallel with the first and second protection ICs, and a current source may be coupled between the negative pack terminal and the intermediate node, wherein the intermediate node is positioned between the first transistor and the second transistor, and the power source is configured to provide a current to the first protection IC through a first current loop.

Abstract: When start control is initiated, the start control device operates in a first operating mode in which an upper limit value of an engine speed is limited to a first upper limit value (NErev1) that is lower than an upper limit value (NErev0) in a non-start control. When an elapsed period of time after a throttle opening has exceeded a predetermined opening in the first operating mode reaches a predetermined standby time, the start control device operates in a second operating mode in which the upper limit value of the engine speed is limited to a second upper limit value (NErev2) that is lower than the first upper limit value. The start control device transitions to an ordinary mode to thereby terminate the start control when a period of time of the second operating mode reaches a predetermined control period of time or a forced cancellation condition holds.

Abstract: A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.

Abstract: A method for manufacturing a semiconductor device includes forming a first mask layer having a first opening on an underlying layer; forming a first layer in a space where the underlying layer is selectively removed via the first opening; forming a second mask layer on the first mask layer and the first layer, the second mask layer having a second opening crossing the first opening; and selectively removing the first layer at a portion where the first opening and the second opening cross. At least one of the first and second mask layers having openings including the first or second opening, the openings being arranged in the first mask layer along a first direction, and/or being arranged in the second mask layer along a second direction, the first opening crossing the second opening in the first direction, and the second opening crossing the first opening in the second direction.

Abstract: A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.

Abstract: A battery reset system. Implementations may include: an embedded battery, a battery control circuit coupled with the embedded battery, a discharging field effect transistor (FET) coupled with the battery control circuit, and a charging FET coupled with the battery control circuit. The system may also include a positive battery terminal coupled with the battery and a negative battery terminal coupled with the embedded battery and a reset terminal coupled with a reset circuit coupled with the battery control circuit. The reset circuit and the battery control circuit may be included in a single semiconductor chip coupled with the discharging FET, charging FET, and embedded battery.

Abstract: A sliding bearing including: a lining; a back metal; and an intermediate layer formed between the back metal and the lining by an Al alloy containing 0.01 wt % or more of at least one solid solution component selected from Zn, Cu, Mg, Li, Mn, V, Zr, Fe, Mo, Co, Ni, Hf, Sc, Ti and W wherein the whole amount of the solid solution component forms a solid solution with Al, in such a manner that the intermediate layer has a thickness of 20 ?m or more and Vickers hardness of 30 or more and 80 or less.