Patents by Inventor Katsumi Yamamoto

Katsumi Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040070739
    Abstract: A method for exposing photographic paper is disclosed that utilizes existing DPE processing labs. The method comprises illuminating a light transmittance device, the light transmittance device being controlled to display a digital image to be printed onto the photographic paper. The photographic paper is then exposed with the light transmitted through said light transmittance device.
    Type: Application
    Filed: October 11, 2002
    Publication date: April 15, 2004
    Inventor: Katsumi Yamamoto
  • Patent number: 6699729
    Abstract: A method of planarizing an image sensor substrate is disclosed. The method comprises depositing a first polymer layer over the image sensor substrate. The first polymer layer is patterned to form pillars. Then, a second polymer layer is deposited over the pillars. Optionally, the second polymer layer is etched back.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: March 2, 2004
    Assignee: OmniVision International Holding Ltd
    Inventor: Katsumi Yamamoto
  • Patent number: 6677788
    Abstract: The present invention is directed to reduce fluctuations in modulation frequency of a VCO caused by a temperature change in a semiconductor integrated circuit for use in a radio communication system of a frequency hopping method performing modulation by controlling the VCO of an LC oscillation type in accordance with transmission data in an open loop by using the VCO. In a semiconductor integrated circuit of a frequency hopping method performing modulation by directly controlling an LC oscillation type VCO on the basis of transmission data and transmitting data while switching a carrier frequency, a temperature characteristic correcting circuit is provided which give a negative temperature characteristic to a reference current value of a circuit (such as a DA converter) for generating a control voltage of the VCO so that a modulation-side control input voltage having a positive temperature characteristic and controlling the VCO comes to have a negative temperature characteristic.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: January 13, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hirokazu Miyagawa, Katsumi Yamamoto, Tatsuji Matsuura, Katsumi Osaki
  • Patent number: 6638786
    Abstract: An image sensor includes an array of pixels formed in a semiconductor substrate. The pixels are grouped as a center portion of pixels and an outer portion of pixels. A first set of micro-lenses is formed over each of the pixels in the center portion of pixels. A second set of micro-lenses is formed over each of the pixels in the outer portion of pixels. The second set of micro-lenses differ from said first set of micro-lenses. In one embodiment, the second set of micro-lenses are taller than the first set of micro-lenses.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: October 28, 2003
    Assignee: Hua Wei Semiconductor (Shanghai ) Co., Ltd.
    Inventor: Katsumi Yamamoto
  • Publication number: 20030179479
    Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.
    Type: Application
    Filed: March 17, 2003
    Publication date: September 25, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Yukie Miyazawa
  • Patent number: 6608358
    Abstract: An image sensor die formed on a wafer is disclosed. The image sensor die comprises a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. Further, a dummy pattern is formed on the image sensor die, wherein the dummy pattern comprises ridges of a dummy pattern material that is operative to evenly distribute a micro-lens material over said wafer.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: August 19, 2003
    Assignee: Hua Wei Semiconductor (Shanghai) Co., Ltd.
    Inventor: Katsumi Yamamoto
  • Patent number: 6563656
    Abstract: A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: May 13, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto
  • Publication number: 20030076139
    Abstract: The present invention is directed to reduce fluctuations in modulation frequency of a VCO caused by a temperature change in a semiconductor integrated circuit for use in a radio communication system of a frequency hopping method performing modulation by controlling the VCO of an LC oscillation type in accordance with transmission data in an open loop by using the VCO. In a semiconductor integrated circuit of a frequency hopping method performing modulation by directly controlling an LC oscillation type VCO on the basis of transmission data and transmitting data while switching a carrier frequency, a temperature characteristic correcting circuit is provided which give a negative temperature characteristic to a reference current value of a circuit (such as a DA converter) for generating a control voltage of the VCO so that a modulation-side control input voltage having a positive temperature characteristic and controlling the VCO comes to have a negative temperature characteristic.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 24, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Hirokazu Miyagawa, Katsumi Yamamoto, Tatsuji Matsuura, Katsumi Osaki
  • Publication number: 20030048099
    Abstract: In accomplishing an LC-oscillation VCO circuit which is immune to frequency deviation and a frequency-hopping radio communication apparatus using the VCO circuit, a modulation semiconductor integrated circuit device is designed to control the LC-oscillation VCO directly with data to be transmitted thereby implementing the modulation and switch the carrier frequency for frequency hopping. The integrated circuit device includes a current adjusting circuit which varies the current value of a D/A conversion circuit for producing a control voltage of VCO in accordance with the carrier frequency so that the variation of a modulation control voltage of VCO has a characteristic that is opposite to the characteristic of modulation frequency deviation, thereby nullifying the modulation frequency deviation of VCO.
    Type: Application
    Filed: March 4, 2002
    Publication date: March 13, 2003
    Inventors: Hirokazu Miyagawa, Katsumi Yamamoto, Tatsuji Matsuura, Masaru Kokubo
  • Publication number: 20030042490
    Abstract: An image sensor includes an array of pixels formed in a semiconductor substrate. The pixels are grouped as a center portion of pixels and an outer portion of pixels. A first set of micro-lenses is formed over each of the pixels in the center portion of pixels. A second set of micro-lenses is formed over each of the pixels in the outer portion of pixels. The second set of micro-lenses differ from said first set of micro-lenses. In one embodiment, the second set of micro-lenses are taller than the first set of micro-lenses.
    Type: Application
    Filed: October 25, 2002
    Publication date: March 6, 2003
    Inventor: Katsumi Yamamoto
  • Patent number: 6514631
    Abstract: A heating furnace tube, a method of using the same and a method of manufacturing the same which have been developed with a view to eliminating inconveniences occurring when a carbon-containing fluid is made to flow in the heating furnace tube. The heating furnace tube which comprises a rare earth oxide particle distributed iron alloy containing 17-26 wt. % of Cr and 2-6 wt. % of Al. The method of manufacturing this heating furnace tube which comprises the steps of forming or inserting an insert metal on or into at least one of a joint end portion of one heating furnace tube element and that of the other heating furnace tube element, bringing these two joint end portions into pressure contact with each other directly or via an intermediate member, and diffusion welding the two heating furnace tube elements to each other by heating the insert metal.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: February 4, 2003
    Assignee: JGC Corporation
    Inventors: Katsumi Yamamoto, Takeo Murata, Rin Sasano, Kenji Sato, Toshikazu Nakamura, Muneyasu Ichimura, Kunio Ishii, Keizo Hosoya
  • Patent number: 6502938
    Abstract: There is provided an attachment structure of a frame body relative to a front portion capable of attaching the frame body to the front portion with a simple construction, and also there is provided an attachment structure of a frame body relative to a front portion wherein stress or distortion of the frame body is hardly transmitted to the front portion. The attachment structure of a frame body relative to a front portion comprises a curved hooked portion formed on the frame body at the central position, and a groove portion defined in the front portion at the central position, wherein the curved hooked portion elastically presses the groove portion so as to engage the curved hooked portion in the groove portion. The frame body can be easily attached to or detached from the front portion with one-touch operation, and hence the operation is made with very ease, and further even if the frame body is distorted or deformed, the distortion is hardly transmitted to the front portion.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: January 7, 2003
    Assignee: Horikawa Co., Ltd.
    Inventors: Kazue Yoshimura, Hideyo Miyoshi, Shuichiro Ishikawa, Katsumi Yamamoto, Osamu Morihiro
  • Publication number: 20020196570
    Abstract: A signal processing device having a feature of analog-to-digital converting a burst signal has a feature of selecting data bus to notify a disk control device 2 of a conversion result via an NRZ data bus. The disk control device 2 includes means for storing the result of the analog-to-digital conversion of said servo positional signal. The positional signal of a head of the disk device is digitalized in an R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.
    Type: Application
    Filed: July 23, 2002
    Publication date: December 26, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto, Yukie Miyazawa
  • Patent number: 6472061
    Abstract: A moisture control construction material is enhanced in decorativeness and improved in stain-resistance by glazing the surfaces thereof. The material is prepared by mixing soil material and clay, molding the mixture to a body, applying glate on the body and firing the body. The body may be performed biscuit firing before glazing. The moisture-absorbing-and-desorbing-performance thereof in each 8-hour cycle is more than 80 g/m2. The body has prosity of 20-25%. More than 40% of pores of the body have a radius of less than 0.1 &mgr;m.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: October 29, 2002
    Assignee: Inax Corporation
    Inventors: Makoto Kotama, Hiroshi Fukumizu, Yukio Matsumoto, Masanari Toyama, Katsumi Yamamoto, Mitsunori Endo
  • Patent number: 6445522
    Abstract: A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitalized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: September 3, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Tsunoda, Shoichi Miyazawa, Hitoshi Ogawa, Ryutaro Horita, Takashi Nara, Masatoshi Nishina, Katsumi Yamamoto
  • Publication number: 20020051115
    Abstract: There is provided an attachment structure of a frame body relative to a front portion capable of attaching the frame body to the front portion with a simple construction, and also there is provided an attachment structure of a frame body relative to a front portion wherein stress or distortion of the frame body is hardly transmitted to the front portion. The attachment structure of a frame body relative to a front portion comprises a curved hooked portion formed on the frame body at the central position, and a groove portion defined in the front portion at the central position, wherein the curved hooked portion elastically presses the groove portion so as to engage the curved hooked portion in the groove portion. The frame body can be easily attached to or detached from the front portion with one-touch operation, and hence the operation is made with very ease, and further even if the frame body is distorted or deformed, the distortion is hardly transmitted to the front portion.
    Type: Application
    Filed: October 30, 2001
    Publication date: May 2, 2002
    Inventors: Kazue Yoshimura, Hideyo Miyoshi, Shuichiro Ishikawa, Katsumi Yamamoto, Osamu Morihiro
  • Patent number: 6380778
    Abstract: Even if duty is shifted to either a state in which an “H” period is long or a state in which an “L” period is long, the duty is recovered to about 50%. A duty correction circuit corrects a duty shift or deviation developed when analog complementary cycle signals having a phase difference of about half cycle therebetween and a duty ratio of about 50% are converted to logic levels, through the use of, for example, serial two-stage NAND gate static latches.
    Type: Grant
    Filed: April 24, 2001
    Date of Patent: April 30, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yoichi Uehara, Katsumi Yamamoto
  • Publication number: 20020031656
    Abstract: A formed building material is provided of which front surface is allowed to be glazed, thereby improving its decorative property and improving its soil resistance and which has hazardous substance adsorbing function. This formed building material is produced by baking, a glaze is applied to a front surface of a main body of the formed building material, and the specific surface area of the main body is 10 m2/g or more. The main body has porosity of 20-50%, and more than 40% of pores of the main body have a radius of less than 0.1 &mgr;m. The glaze forms a glass layer on 90% or less of the entire surface area of the main body and/or the maximum thickness of the glass layer formed by the glaze is 300 &mgr;m or less. The formed building material is attached to a lower portion of a wall and/or a floor of a room.
    Type: Application
    Filed: October 4, 2001
    Publication date: March 14, 2002
    Applicant: INAX CORPORATION
    Inventors: Makoto Kotama, Hiroshi Fukumizu, Yukio Matsumoto, Masanari Toyama, Katsumi Yamamoto, Mitsunori Endo, Shigeru Yokoyama
  • Patent number: 6338744
    Abstract: Provided is a high purity polishing slurry which provides a material to be polished with a high scratch resistance and has a high polishing efficiency and which less contaminates the material to be polished. The polishing slurry comprises water and silica particles dispersed in water, wherein the above silica particles have an average primary particle size of 50 to 300 nm and a refractive index of 1.41 to 1.44 and are synthesized in a liquid phase and produced without passing through a drying step; and the K value is 5×10−6 mol/m2 or more. Further, a polishing process for a semiconductor wafer using the above polishing slurry is provided.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: January 15, 2002
    Assignees: Tokuyama Corporation, Toshiba Corporation
    Inventors: Yoshikuni Tateyama, Katsumi Yamamoto, Hiroshi Kato, Kazuhiko Hayashi, Hiroyuki Kono
  • Publication number: 20010043103
    Abstract: Even if duty is shifted to either a state in which an “H” period is long or a state in which an “L” period is long, the duty is recovered to about 50%.
    Type: Application
    Filed: April 24, 2001
    Publication date: November 22, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Yoichi Uehara, Katsumi Yamamoto